EFM32 Pearl Gecko Software Documentation
efm32pg1-doc-4.2.1
Main Page
Related Pages
Modules
Data Structures
Files
Documentation Home
silabs.com
File List
Globals
efm32pg1b_msc.h
Go to the documentation of this file.
1
/**************************************************************************/
32
/**************************************************************************/
36
/**************************************************************************/
41
typedef
struct
42
{
43
__IO
uint32_t
CTRL
;
44
__IO
uint32_t
READCTRL
;
45
__IO
uint32_t
WRITECTRL
;
46
__IO
uint32_t
WRITECMD
;
47
__IO
uint32_t
ADDRB
;
48
uint32_t RESERVED0[1];
49
__IO
uint32_t
WDATA
;
50
__I uint32_t
STATUS
;
52
uint32_t RESERVED1[4];
53
__I uint32_t
IF
;
54
__IO
uint32_t
IFS
;
55
__IO
uint32_t
IFC
;
56
__IO
uint32_t
IEN
;
57
__IO
uint32_t
LOCK
;
58
__IO
uint32_t
CACHECMD
;
59
__I uint32_t
CACHEHITS
;
60
__I uint32_t
CACHEMISSES
;
62
uint32_t RESERVED2[1];
63
__IO
uint32_t
MASSLOCK
;
64
uint32_t RESERVED3[1];
65
__IO
uint32_t
STARTUP
;
67
uint32_t RESERVED4[5];
68
__IO
uint32_t
CMD
;
69
}
MSC_TypeDef
;
71
/**************************************************************************/
76
/* Bit fields for MSC CTRL */
77
#define _MSC_CTRL_RESETVALUE 0x00000001UL
78
#define _MSC_CTRL_MASK 0x0000000FUL
79
#define MSC_CTRL_ADDRFAULTEN (0x1UL << 0)
80
#define _MSC_CTRL_ADDRFAULTEN_SHIFT 0
81
#define _MSC_CTRL_ADDRFAULTEN_MASK 0x1UL
82
#define _MSC_CTRL_ADDRFAULTEN_DEFAULT 0x00000001UL
83
#define MSC_CTRL_ADDRFAULTEN_DEFAULT (_MSC_CTRL_ADDRFAULTEN_DEFAULT << 0)
84
#define MSC_CTRL_CLKDISFAULTEN (0x1UL << 1)
85
#define _MSC_CTRL_CLKDISFAULTEN_SHIFT 1
86
#define _MSC_CTRL_CLKDISFAULTEN_MASK 0x2UL
87
#define _MSC_CTRL_CLKDISFAULTEN_DEFAULT 0x00000000UL
88
#define MSC_CTRL_CLKDISFAULTEN_DEFAULT (_MSC_CTRL_CLKDISFAULTEN_DEFAULT << 1)
89
#define MSC_CTRL_PWRUPONDEMAND (0x1UL << 2)
90
#define _MSC_CTRL_PWRUPONDEMAND_SHIFT 2
91
#define _MSC_CTRL_PWRUPONDEMAND_MASK 0x4UL
92
#define _MSC_CTRL_PWRUPONDEMAND_DEFAULT 0x00000000UL
93
#define MSC_CTRL_PWRUPONDEMAND_DEFAULT (_MSC_CTRL_PWRUPONDEMAND_DEFAULT << 2)
94
#define MSC_CTRL_IFCREADCLEAR (0x1UL << 3)
95
#define _MSC_CTRL_IFCREADCLEAR_SHIFT 3
96
#define _MSC_CTRL_IFCREADCLEAR_MASK 0x8UL
97
#define _MSC_CTRL_IFCREADCLEAR_DEFAULT 0x00000000UL
98
#define MSC_CTRL_IFCREADCLEAR_DEFAULT (_MSC_CTRL_IFCREADCLEAR_DEFAULT << 3)
100
/* Bit fields for MSC READCTRL */
101
#define _MSC_READCTRL_RESETVALUE 0x01000100UL
102
#define _MSC_READCTRL_MASK 0x13000338UL
103
#define MSC_READCTRL_IFCDIS (0x1UL << 3)
104
#define _MSC_READCTRL_IFCDIS_SHIFT 3
105
#define _MSC_READCTRL_IFCDIS_MASK 0x8UL
106
#define _MSC_READCTRL_IFCDIS_DEFAULT 0x00000000UL
107
#define MSC_READCTRL_IFCDIS_DEFAULT (_MSC_READCTRL_IFCDIS_DEFAULT << 3)
108
#define MSC_READCTRL_AIDIS (0x1UL << 4)
109
#define _MSC_READCTRL_AIDIS_SHIFT 4
110
#define _MSC_READCTRL_AIDIS_MASK 0x10UL
111
#define _MSC_READCTRL_AIDIS_DEFAULT 0x00000000UL
112
#define MSC_READCTRL_AIDIS_DEFAULT (_MSC_READCTRL_AIDIS_DEFAULT << 4)
113
#define MSC_READCTRL_ICCDIS (0x1UL << 5)
114
#define _MSC_READCTRL_ICCDIS_SHIFT 5
115
#define _MSC_READCTRL_ICCDIS_MASK 0x20UL
116
#define _MSC_READCTRL_ICCDIS_DEFAULT 0x00000000UL
117
#define MSC_READCTRL_ICCDIS_DEFAULT (_MSC_READCTRL_ICCDIS_DEFAULT << 5)
118
#define MSC_READCTRL_PREFETCH (0x1UL << 8)
119
#define _MSC_READCTRL_PREFETCH_SHIFT 8
120
#define _MSC_READCTRL_PREFETCH_MASK 0x100UL
121
#define _MSC_READCTRL_PREFETCH_DEFAULT 0x00000001UL
122
#define MSC_READCTRL_PREFETCH_DEFAULT (_MSC_READCTRL_PREFETCH_DEFAULT << 8)
123
#define MSC_READCTRL_USEHPROT (0x1UL << 9)
124
#define _MSC_READCTRL_USEHPROT_SHIFT 9
125
#define _MSC_READCTRL_USEHPROT_MASK 0x200UL
126
#define _MSC_READCTRL_USEHPROT_DEFAULT 0x00000000UL
127
#define MSC_READCTRL_USEHPROT_DEFAULT (_MSC_READCTRL_USEHPROT_DEFAULT << 9)
128
#define _MSC_READCTRL_MODE_SHIFT 24
129
#define _MSC_READCTRL_MODE_MASK 0x3000000UL
130
#define _MSC_READCTRL_MODE_WS0 0x00000000UL
131
#define _MSC_READCTRL_MODE_DEFAULT 0x00000001UL
132
#define _MSC_READCTRL_MODE_WS1 0x00000001UL
133
#define MSC_READCTRL_MODE_WS0 (_MSC_READCTRL_MODE_WS0 << 24)
134
#define MSC_READCTRL_MODE_DEFAULT (_MSC_READCTRL_MODE_DEFAULT << 24)
135
#define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24)
136
#define MSC_READCTRL_SCBTP (0x1UL << 28)
137
#define _MSC_READCTRL_SCBTP_SHIFT 28
138
#define _MSC_READCTRL_SCBTP_MASK 0x10000000UL
139
#define _MSC_READCTRL_SCBTP_DEFAULT 0x00000000UL
140
#define MSC_READCTRL_SCBTP_DEFAULT (_MSC_READCTRL_SCBTP_DEFAULT << 28)
142
/* Bit fields for MSC WRITECTRL */
143
#define _MSC_WRITECTRL_RESETVALUE 0x00000000UL
144
#define _MSC_WRITECTRL_MASK 0x00000003UL
145
#define MSC_WRITECTRL_WREN (0x1UL << 0)
146
#define _MSC_WRITECTRL_WREN_SHIFT 0
147
#define _MSC_WRITECTRL_WREN_MASK 0x1UL
148
#define _MSC_WRITECTRL_WREN_DEFAULT 0x00000000UL
149
#define MSC_WRITECTRL_WREN_DEFAULT (_MSC_WRITECTRL_WREN_DEFAULT << 0)
150
#define MSC_WRITECTRL_IRQERASEABORT (0x1UL << 1)
151
#define _MSC_WRITECTRL_IRQERASEABORT_SHIFT 1
152
#define _MSC_WRITECTRL_IRQERASEABORT_MASK 0x2UL
153
#define _MSC_WRITECTRL_IRQERASEABORT_DEFAULT 0x00000000UL
154
#define MSC_WRITECTRL_IRQERASEABORT_DEFAULT (_MSC_WRITECTRL_IRQERASEABORT_DEFAULT << 1)
156
/* Bit fields for MSC WRITECMD */
157
#define _MSC_WRITECMD_RESETVALUE 0x00000000UL
158
#define _MSC_WRITECMD_MASK 0x0000113FUL
159
#define MSC_WRITECMD_LADDRIM (0x1UL << 0)
160
#define _MSC_WRITECMD_LADDRIM_SHIFT 0
161
#define _MSC_WRITECMD_LADDRIM_MASK 0x1UL
162
#define _MSC_WRITECMD_LADDRIM_DEFAULT 0x00000000UL
163
#define MSC_WRITECMD_LADDRIM_DEFAULT (_MSC_WRITECMD_LADDRIM_DEFAULT << 0)
164
#define MSC_WRITECMD_ERASEPAGE (0x1UL << 1)
165
#define _MSC_WRITECMD_ERASEPAGE_SHIFT 1
166
#define _MSC_WRITECMD_ERASEPAGE_MASK 0x2UL
167
#define _MSC_WRITECMD_ERASEPAGE_DEFAULT 0x00000000UL
168
#define MSC_WRITECMD_ERASEPAGE_DEFAULT (_MSC_WRITECMD_ERASEPAGE_DEFAULT << 1)
169
#define MSC_WRITECMD_WRITEEND (0x1UL << 2)
170
#define _MSC_WRITECMD_WRITEEND_SHIFT 2
171
#define _MSC_WRITECMD_WRITEEND_MASK 0x4UL
172
#define _MSC_WRITECMD_WRITEEND_DEFAULT 0x00000000UL
173
#define MSC_WRITECMD_WRITEEND_DEFAULT (_MSC_WRITECMD_WRITEEND_DEFAULT << 2)
174
#define MSC_WRITECMD_WRITEONCE (0x1UL << 3)
175
#define _MSC_WRITECMD_WRITEONCE_SHIFT 3
176
#define _MSC_WRITECMD_WRITEONCE_MASK 0x8UL
177
#define _MSC_WRITECMD_WRITEONCE_DEFAULT 0x00000000UL
178
#define MSC_WRITECMD_WRITEONCE_DEFAULT (_MSC_WRITECMD_WRITEONCE_DEFAULT << 3)
179
#define MSC_WRITECMD_WRITETRIG (0x1UL << 4)
180
#define _MSC_WRITECMD_WRITETRIG_SHIFT 4
181
#define _MSC_WRITECMD_WRITETRIG_MASK 0x10UL
182
#define _MSC_WRITECMD_WRITETRIG_DEFAULT 0x00000000UL
183
#define MSC_WRITECMD_WRITETRIG_DEFAULT (_MSC_WRITECMD_WRITETRIG_DEFAULT << 4)
184
#define MSC_WRITECMD_ERASEABORT (0x1UL << 5)
185
#define _MSC_WRITECMD_ERASEABORT_SHIFT 5
186
#define _MSC_WRITECMD_ERASEABORT_MASK 0x20UL
187
#define _MSC_WRITECMD_ERASEABORT_DEFAULT 0x00000000UL
188
#define MSC_WRITECMD_ERASEABORT_DEFAULT (_MSC_WRITECMD_ERASEABORT_DEFAULT << 5)
189
#define MSC_WRITECMD_ERASEMAIN0 (0x1UL << 8)
190
#define _MSC_WRITECMD_ERASEMAIN0_SHIFT 8
191
#define _MSC_WRITECMD_ERASEMAIN0_MASK 0x100UL
192
#define _MSC_WRITECMD_ERASEMAIN0_DEFAULT 0x00000000UL
193
#define MSC_WRITECMD_ERASEMAIN0_DEFAULT (_MSC_WRITECMD_ERASEMAIN0_DEFAULT << 8)
194
#define MSC_WRITECMD_CLEARWDATA (0x1UL << 12)
195
#define _MSC_WRITECMD_CLEARWDATA_SHIFT 12
196
#define _MSC_WRITECMD_CLEARWDATA_MASK 0x1000UL
197
#define _MSC_WRITECMD_CLEARWDATA_DEFAULT 0x00000000UL
198
#define MSC_WRITECMD_CLEARWDATA_DEFAULT (_MSC_WRITECMD_CLEARWDATA_DEFAULT << 12)
200
/* Bit fields for MSC ADDRB */
201
#define _MSC_ADDRB_RESETVALUE 0x00000000UL
202
#define _MSC_ADDRB_MASK 0xFFFFFFFFUL
203
#define _MSC_ADDRB_ADDRB_SHIFT 0
204
#define _MSC_ADDRB_ADDRB_MASK 0xFFFFFFFFUL
205
#define _MSC_ADDRB_ADDRB_DEFAULT 0x00000000UL
206
#define MSC_ADDRB_ADDRB_DEFAULT (_MSC_ADDRB_ADDRB_DEFAULT << 0)
208
/* Bit fields for MSC WDATA */
209
#define _MSC_WDATA_RESETVALUE 0x00000000UL
210
#define _MSC_WDATA_MASK 0xFFFFFFFFUL
211
#define _MSC_WDATA_WDATA_SHIFT 0
212
#define _MSC_WDATA_WDATA_MASK 0xFFFFFFFFUL
213
#define _MSC_WDATA_WDATA_DEFAULT 0x00000000UL
214
#define MSC_WDATA_WDATA_DEFAULT (_MSC_WDATA_WDATA_DEFAULT << 0)
216
/* Bit fields for MSC STATUS */
217
#define _MSC_STATUS_RESETVALUE 0x00000008UL
218
#define _MSC_STATUS_MASK 0x0000007FUL
219
#define MSC_STATUS_BUSY (0x1UL << 0)
220
#define _MSC_STATUS_BUSY_SHIFT 0
221
#define _MSC_STATUS_BUSY_MASK 0x1UL
222
#define _MSC_STATUS_BUSY_DEFAULT 0x00000000UL
223
#define MSC_STATUS_BUSY_DEFAULT (_MSC_STATUS_BUSY_DEFAULT << 0)
224
#define MSC_STATUS_LOCKED (0x1UL << 1)
225
#define _MSC_STATUS_LOCKED_SHIFT 1
226
#define _MSC_STATUS_LOCKED_MASK 0x2UL
227
#define _MSC_STATUS_LOCKED_DEFAULT 0x00000000UL
228
#define MSC_STATUS_LOCKED_DEFAULT (_MSC_STATUS_LOCKED_DEFAULT << 1)
229
#define MSC_STATUS_INVADDR (0x1UL << 2)
230
#define _MSC_STATUS_INVADDR_SHIFT 2
231
#define _MSC_STATUS_INVADDR_MASK 0x4UL
232
#define _MSC_STATUS_INVADDR_DEFAULT 0x00000000UL
233
#define MSC_STATUS_INVADDR_DEFAULT (_MSC_STATUS_INVADDR_DEFAULT << 2)
234
#define MSC_STATUS_WDATAREADY (0x1UL << 3)
235
#define _MSC_STATUS_WDATAREADY_SHIFT 3
236
#define _MSC_STATUS_WDATAREADY_MASK 0x8UL
237
#define _MSC_STATUS_WDATAREADY_DEFAULT 0x00000001UL
238
#define MSC_STATUS_WDATAREADY_DEFAULT (_MSC_STATUS_WDATAREADY_DEFAULT << 3)
239
#define MSC_STATUS_WORDTIMEOUT (0x1UL << 4)
240
#define _MSC_STATUS_WORDTIMEOUT_SHIFT 4
241
#define _MSC_STATUS_WORDTIMEOUT_MASK 0x10UL
242
#define _MSC_STATUS_WORDTIMEOUT_DEFAULT 0x00000000UL
243
#define MSC_STATUS_WORDTIMEOUT_DEFAULT (_MSC_STATUS_WORDTIMEOUT_DEFAULT << 4)
244
#define MSC_STATUS_ERASEABORTED (0x1UL << 5)
245
#define _MSC_STATUS_ERASEABORTED_SHIFT 5
246
#define _MSC_STATUS_ERASEABORTED_MASK 0x20UL
247
#define _MSC_STATUS_ERASEABORTED_DEFAULT 0x00000000UL
248
#define MSC_STATUS_ERASEABORTED_DEFAULT (_MSC_STATUS_ERASEABORTED_DEFAULT << 5)
249
#define MSC_STATUS_PCRUNNING (0x1UL << 6)
250
#define _MSC_STATUS_PCRUNNING_SHIFT 6
251
#define _MSC_STATUS_PCRUNNING_MASK 0x40UL
252
#define _MSC_STATUS_PCRUNNING_DEFAULT 0x00000000UL
253
#define MSC_STATUS_PCRUNNING_DEFAULT (_MSC_STATUS_PCRUNNING_DEFAULT << 6)
255
/* Bit fields for MSC IF */
256
#define _MSC_IF_RESETVALUE 0x00000000UL
257
#define _MSC_IF_MASK 0x0000003FUL
258
#define MSC_IF_ERASE (0x1UL << 0)
259
#define _MSC_IF_ERASE_SHIFT 0
260
#define _MSC_IF_ERASE_MASK 0x1UL
261
#define _MSC_IF_ERASE_DEFAULT 0x00000000UL
262
#define MSC_IF_ERASE_DEFAULT (_MSC_IF_ERASE_DEFAULT << 0)
263
#define MSC_IF_WRITE (0x1UL << 1)
264
#define _MSC_IF_WRITE_SHIFT 1
265
#define _MSC_IF_WRITE_MASK 0x2UL
266
#define _MSC_IF_WRITE_DEFAULT 0x00000000UL
267
#define MSC_IF_WRITE_DEFAULT (_MSC_IF_WRITE_DEFAULT << 1)
268
#define MSC_IF_CHOF (0x1UL << 2)
269
#define _MSC_IF_CHOF_SHIFT 2
270
#define _MSC_IF_CHOF_MASK 0x4UL
271
#define _MSC_IF_CHOF_DEFAULT 0x00000000UL
272
#define MSC_IF_CHOF_DEFAULT (_MSC_IF_CHOF_DEFAULT << 2)
273
#define MSC_IF_CMOF (0x1UL << 3)
274
#define _MSC_IF_CMOF_SHIFT 3
275
#define _MSC_IF_CMOF_MASK 0x8UL
276
#define _MSC_IF_CMOF_DEFAULT 0x00000000UL
277
#define MSC_IF_CMOF_DEFAULT (_MSC_IF_CMOF_DEFAULT << 3)
278
#define MSC_IF_PWRUPF (0x1UL << 4)
279
#define _MSC_IF_PWRUPF_SHIFT 4
280
#define _MSC_IF_PWRUPF_MASK 0x10UL
281
#define _MSC_IF_PWRUPF_DEFAULT 0x00000000UL
282
#define MSC_IF_PWRUPF_DEFAULT (_MSC_IF_PWRUPF_DEFAULT << 4)
283
#define MSC_IF_ICACHERR (0x1UL << 5)
284
#define _MSC_IF_ICACHERR_SHIFT 5
285
#define _MSC_IF_ICACHERR_MASK 0x20UL
286
#define _MSC_IF_ICACHERR_DEFAULT 0x00000000UL
287
#define MSC_IF_ICACHERR_DEFAULT (_MSC_IF_ICACHERR_DEFAULT << 5)
289
/* Bit fields for MSC IFS */
290
#define _MSC_IFS_RESETVALUE 0x00000000UL
291
#define _MSC_IFS_MASK 0x0000003FUL
292
#define MSC_IFS_ERASE (0x1UL << 0)
293
#define _MSC_IFS_ERASE_SHIFT 0
294
#define _MSC_IFS_ERASE_MASK 0x1UL
295
#define _MSC_IFS_ERASE_DEFAULT 0x00000000UL
296
#define MSC_IFS_ERASE_DEFAULT (_MSC_IFS_ERASE_DEFAULT << 0)
297
#define MSC_IFS_WRITE (0x1UL << 1)
298
#define _MSC_IFS_WRITE_SHIFT 1
299
#define _MSC_IFS_WRITE_MASK 0x2UL
300
#define _MSC_IFS_WRITE_DEFAULT 0x00000000UL
301
#define MSC_IFS_WRITE_DEFAULT (_MSC_IFS_WRITE_DEFAULT << 1)
302
#define MSC_IFS_CHOF (0x1UL << 2)
303
#define _MSC_IFS_CHOF_SHIFT 2
304
#define _MSC_IFS_CHOF_MASK 0x4UL
305
#define _MSC_IFS_CHOF_DEFAULT 0x00000000UL
306
#define MSC_IFS_CHOF_DEFAULT (_MSC_IFS_CHOF_DEFAULT << 2)
307
#define MSC_IFS_CMOF (0x1UL << 3)
308
#define _MSC_IFS_CMOF_SHIFT 3
309
#define _MSC_IFS_CMOF_MASK 0x8UL
310
#define _MSC_IFS_CMOF_DEFAULT 0x00000000UL
311
#define MSC_IFS_CMOF_DEFAULT (_MSC_IFS_CMOF_DEFAULT << 3)
312
#define MSC_IFS_PWRUPF (0x1UL << 4)
313
#define _MSC_IFS_PWRUPF_SHIFT 4
314
#define _MSC_IFS_PWRUPF_MASK 0x10UL
315
#define _MSC_IFS_PWRUPF_DEFAULT 0x00000000UL
316
#define MSC_IFS_PWRUPF_DEFAULT (_MSC_IFS_PWRUPF_DEFAULT << 4)
317
#define MSC_IFS_ICACHERR (0x1UL << 5)
318
#define _MSC_IFS_ICACHERR_SHIFT 5
319
#define _MSC_IFS_ICACHERR_MASK 0x20UL
320
#define _MSC_IFS_ICACHERR_DEFAULT 0x00000000UL
321
#define MSC_IFS_ICACHERR_DEFAULT (_MSC_IFS_ICACHERR_DEFAULT << 5)
323
/* Bit fields for MSC IFC */
324
#define _MSC_IFC_RESETVALUE 0x00000000UL
325
#define _MSC_IFC_MASK 0x0000003FUL
326
#define MSC_IFC_ERASE (0x1UL << 0)
327
#define _MSC_IFC_ERASE_SHIFT 0
328
#define _MSC_IFC_ERASE_MASK 0x1UL
329
#define _MSC_IFC_ERASE_DEFAULT 0x00000000UL
330
#define MSC_IFC_ERASE_DEFAULT (_MSC_IFC_ERASE_DEFAULT << 0)
331
#define MSC_IFC_WRITE (0x1UL << 1)
332
#define _MSC_IFC_WRITE_SHIFT 1
333
#define _MSC_IFC_WRITE_MASK 0x2UL
334
#define _MSC_IFC_WRITE_DEFAULT 0x00000000UL
335
#define MSC_IFC_WRITE_DEFAULT (_MSC_IFC_WRITE_DEFAULT << 1)
336
#define MSC_IFC_CHOF (0x1UL << 2)
337
#define _MSC_IFC_CHOF_SHIFT 2
338
#define _MSC_IFC_CHOF_MASK 0x4UL
339
#define _MSC_IFC_CHOF_DEFAULT 0x00000000UL
340
#define MSC_IFC_CHOF_DEFAULT (_MSC_IFC_CHOF_DEFAULT << 2)
341
#define MSC_IFC_CMOF (0x1UL << 3)
342
#define _MSC_IFC_CMOF_SHIFT 3
343
#define _MSC_IFC_CMOF_MASK 0x8UL
344
#define _MSC_IFC_CMOF_DEFAULT 0x00000000UL
345
#define MSC_IFC_CMOF_DEFAULT (_MSC_IFC_CMOF_DEFAULT << 3)
346
#define MSC_IFC_PWRUPF (0x1UL << 4)
347
#define _MSC_IFC_PWRUPF_SHIFT 4
348
#define _MSC_IFC_PWRUPF_MASK 0x10UL
349
#define _MSC_IFC_PWRUPF_DEFAULT 0x00000000UL
350
#define MSC_IFC_PWRUPF_DEFAULT (_MSC_IFC_PWRUPF_DEFAULT << 4)
351
#define MSC_IFC_ICACHERR (0x1UL << 5)
352
#define _MSC_IFC_ICACHERR_SHIFT 5
353
#define _MSC_IFC_ICACHERR_MASK 0x20UL
354
#define _MSC_IFC_ICACHERR_DEFAULT 0x00000000UL
355
#define MSC_IFC_ICACHERR_DEFAULT (_MSC_IFC_ICACHERR_DEFAULT << 5)
357
/* Bit fields for MSC IEN */
358
#define _MSC_IEN_RESETVALUE 0x00000000UL
359
#define _MSC_IEN_MASK 0x0000003FUL
360
#define MSC_IEN_ERASE (0x1UL << 0)
361
#define _MSC_IEN_ERASE_SHIFT 0
362
#define _MSC_IEN_ERASE_MASK 0x1UL
363
#define _MSC_IEN_ERASE_DEFAULT 0x00000000UL
364
#define MSC_IEN_ERASE_DEFAULT (_MSC_IEN_ERASE_DEFAULT << 0)
365
#define MSC_IEN_WRITE (0x1UL << 1)
366
#define _MSC_IEN_WRITE_SHIFT 1
367
#define _MSC_IEN_WRITE_MASK 0x2UL
368
#define _MSC_IEN_WRITE_DEFAULT 0x00000000UL
369
#define MSC_IEN_WRITE_DEFAULT (_MSC_IEN_WRITE_DEFAULT << 1)
370
#define MSC_IEN_CHOF (0x1UL << 2)
371
#define _MSC_IEN_CHOF_SHIFT 2
372
#define _MSC_IEN_CHOF_MASK 0x4UL
373
#define _MSC_IEN_CHOF_DEFAULT 0x00000000UL
374
#define MSC_IEN_CHOF_DEFAULT (_MSC_IEN_CHOF_DEFAULT << 2)
375
#define MSC_IEN_CMOF (0x1UL << 3)
376
#define _MSC_IEN_CMOF_SHIFT 3
377
#define _MSC_IEN_CMOF_MASK 0x8UL
378
#define _MSC_IEN_CMOF_DEFAULT 0x00000000UL
379
#define MSC_IEN_CMOF_DEFAULT (_MSC_IEN_CMOF_DEFAULT << 3)
380
#define MSC_IEN_PWRUPF (0x1UL << 4)
381
#define _MSC_IEN_PWRUPF_SHIFT 4
382
#define _MSC_IEN_PWRUPF_MASK 0x10UL
383
#define _MSC_IEN_PWRUPF_DEFAULT 0x00000000UL
384
#define MSC_IEN_PWRUPF_DEFAULT (_MSC_IEN_PWRUPF_DEFAULT << 4)
385
#define MSC_IEN_ICACHERR (0x1UL << 5)
386
#define _MSC_IEN_ICACHERR_SHIFT 5
387
#define _MSC_IEN_ICACHERR_MASK 0x20UL
388
#define _MSC_IEN_ICACHERR_DEFAULT 0x00000000UL
389
#define MSC_IEN_ICACHERR_DEFAULT (_MSC_IEN_ICACHERR_DEFAULT << 5)
391
/* Bit fields for MSC LOCK */
392
#define _MSC_LOCK_RESETVALUE 0x00000000UL
393
#define _MSC_LOCK_MASK 0x0000FFFFUL
394
#define _MSC_LOCK_LOCKKEY_SHIFT 0
395
#define _MSC_LOCK_LOCKKEY_MASK 0xFFFFUL
396
#define _MSC_LOCK_LOCKKEY_DEFAULT 0x00000000UL
397
#define _MSC_LOCK_LOCKKEY_LOCK 0x00000000UL
398
#define _MSC_LOCK_LOCKKEY_UNLOCKED 0x00000000UL
399
#define _MSC_LOCK_LOCKKEY_LOCKED 0x00000001UL
400
#define _MSC_LOCK_LOCKKEY_UNLOCK 0x00001B71UL
401
#define MSC_LOCK_LOCKKEY_DEFAULT (_MSC_LOCK_LOCKKEY_DEFAULT << 0)
402
#define MSC_LOCK_LOCKKEY_LOCK (_MSC_LOCK_LOCKKEY_LOCK << 0)
403
#define MSC_LOCK_LOCKKEY_UNLOCKED (_MSC_LOCK_LOCKKEY_UNLOCKED << 0)
404
#define MSC_LOCK_LOCKKEY_LOCKED (_MSC_LOCK_LOCKKEY_LOCKED << 0)
405
#define MSC_LOCK_LOCKKEY_UNLOCK (_MSC_LOCK_LOCKKEY_UNLOCK << 0)
407
/* Bit fields for MSC CACHECMD */
408
#define _MSC_CACHECMD_RESETVALUE 0x00000000UL
409
#define _MSC_CACHECMD_MASK 0x00000007UL
410
#define MSC_CACHECMD_INVCACHE (0x1UL << 0)
411
#define _MSC_CACHECMD_INVCACHE_SHIFT 0
412
#define _MSC_CACHECMD_INVCACHE_MASK 0x1UL
413
#define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL
414
#define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0)
415
#define MSC_CACHECMD_STARTPC (0x1UL << 1)
416
#define _MSC_CACHECMD_STARTPC_SHIFT 1
417
#define _MSC_CACHECMD_STARTPC_MASK 0x2UL
418
#define _MSC_CACHECMD_STARTPC_DEFAULT 0x00000000UL
419
#define MSC_CACHECMD_STARTPC_DEFAULT (_MSC_CACHECMD_STARTPC_DEFAULT << 1)
420
#define MSC_CACHECMD_STOPPC (0x1UL << 2)
421
#define _MSC_CACHECMD_STOPPC_SHIFT 2
422
#define _MSC_CACHECMD_STOPPC_MASK 0x4UL
423
#define _MSC_CACHECMD_STOPPC_DEFAULT 0x00000000UL
424
#define MSC_CACHECMD_STOPPC_DEFAULT (_MSC_CACHECMD_STOPPC_DEFAULT << 2)
426
/* Bit fields for MSC CACHEHITS */
427
#define _MSC_CACHEHITS_RESETVALUE 0x00000000UL
428
#define _MSC_CACHEHITS_MASK 0x000FFFFFUL
429
#define _MSC_CACHEHITS_CACHEHITS_SHIFT 0
430
#define _MSC_CACHEHITS_CACHEHITS_MASK 0xFFFFFUL
431
#define _MSC_CACHEHITS_CACHEHITS_DEFAULT 0x00000000UL
432
#define MSC_CACHEHITS_CACHEHITS_DEFAULT (_MSC_CACHEHITS_CACHEHITS_DEFAULT << 0)
434
/* Bit fields for MSC CACHEMISSES */
435
#define _MSC_CACHEMISSES_RESETVALUE 0x00000000UL
436
#define _MSC_CACHEMISSES_MASK 0x000FFFFFUL
437
#define _MSC_CACHEMISSES_CACHEMISSES_SHIFT 0
438
#define _MSC_CACHEMISSES_CACHEMISSES_MASK 0xFFFFFUL
439
#define _MSC_CACHEMISSES_CACHEMISSES_DEFAULT 0x00000000UL
440
#define MSC_CACHEMISSES_CACHEMISSES_DEFAULT (_MSC_CACHEMISSES_CACHEMISSES_DEFAULT << 0)
442
/* Bit fields for MSC MASSLOCK */
443
#define _MSC_MASSLOCK_RESETVALUE 0x00000001UL
444
#define _MSC_MASSLOCK_MASK 0x0000FFFFUL
445
#define _MSC_MASSLOCK_LOCKKEY_SHIFT 0
446
#define _MSC_MASSLOCK_LOCKKEY_MASK 0xFFFFUL
447
#define _MSC_MASSLOCK_LOCKKEY_LOCK 0x00000000UL
448
#define _MSC_MASSLOCK_LOCKKEY_UNLOCKED 0x00000000UL
449
#define _MSC_MASSLOCK_LOCKKEY_DEFAULT 0x00000001UL
450
#define _MSC_MASSLOCK_LOCKKEY_LOCKED 0x00000001UL
451
#define _MSC_MASSLOCK_LOCKKEY_UNLOCK 0x0000631AUL
452
#define MSC_MASSLOCK_LOCKKEY_LOCK (_MSC_MASSLOCK_LOCKKEY_LOCK << 0)
453
#define MSC_MASSLOCK_LOCKKEY_UNLOCKED (_MSC_MASSLOCK_LOCKKEY_UNLOCKED << 0)
454
#define MSC_MASSLOCK_LOCKKEY_DEFAULT (_MSC_MASSLOCK_LOCKKEY_DEFAULT << 0)
455
#define MSC_MASSLOCK_LOCKKEY_LOCKED (_MSC_MASSLOCK_LOCKKEY_LOCKED << 0)
456
#define MSC_MASSLOCK_LOCKKEY_UNLOCK (_MSC_MASSLOCK_LOCKKEY_UNLOCK << 0)
458
/* Bit fields for MSC STARTUP */
459
#define _MSC_STARTUP_RESETVALUE 0x1300104DUL
460
#define _MSC_STARTUP_MASK 0x773FF3FFUL
461
#define _MSC_STARTUP_STDLY0_SHIFT 0
462
#define _MSC_STARTUP_STDLY0_MASK 0x3FFUL
463
#define _MSC_STARTUP_STDLY0_DEFAULT 0x0000004DUL
464
#define MSC_STARTUP_STDLY0_DEFAULT (_MSC_STARTUP_STDLY0_DEFAULT << 0)
465
#define _MSC_STARTUP_STDLY1_SHIFT 12
466
#define _MSC_STARTUP_STDLY1_MASK 0x3FF000UL
467
#define _MSC_STARTUP_STDLY1_DEFAULT 0x00000001UL
468
#define MSC_STARTUP_STDLY1_DEFAULT (_MSC_STARTUP_STDLY1_DEFAULT << 12)
469
#define MSC_STARTUP_ASTWAIT (0x1UL << 24)
470
#define _MSC_STARTUP_ASTWAIT_SHIFT 24
471
#define _MSC_STARTUP_ASTWAIT_MASK 0x1000000UL
472
#define _MSC_STARTUP_ASTWAIT_DEFAULT 0x00000001UL
473
#define MSC_STARTUP_ASTWAIT_DEFAULT (_MSC_STARTUP_ASTWAIT_DEFAULT << 24)
474
#define MSC_STARTUP_STWSEN (0x1UL << 25)
475
#define _MSC_STARTUP_STWSEN_SHIFT 25
476
#define _MSC_STARTUP_STWSEN_MASK 0x2000000UL
477
#define _MSC_STARTUP_STWSEN_DEFAULT 0x00000001UL
478
#define MSC_STARTUP_STWSEN_DEFAULT (_MSC_STARTUP_STWSEN_DEFAULT << 25)
479
#define MSC_STARTUP_STWSAEN (0x1UL << 26)
480
#define _MSC_STARTUP_STWSAEN_SHIFT 26
481
#define _MSC_STARTUP_STWSAEN_MASK 0x4000000UL
482
#define _MSC_STARTUP_STWSAEN_DEFAULT 0x00000000UL
483
#define MSC_STARTUP_STWSAEN_DEFAULT (_MSC_STARTUP_STWSAEN_DEFAULT << 26)
484
#define _MSC_STARTUP_STWS_SHIFT 28
485
#define _MSC_STARTUP_STWS_MASK 0x70000000UL
486
#define _MSC_STARTUP_STWS_DEFAULT 0x00000001UL
487
#define MSC_STARTUP_STWS_DEFAULT (_MSC_STARTUP_STWS_DEFAULT << 28)
489
/* Bit fields for MSC CMD */
490
#define _MSC_CMD_RESETVALUE 0x00000000UL
491
#define _MSC_CMD_MASK 0x00000001UL
492
#define MSC_CMD_PWRUP (0x1UL << 0)
493
#define _MSC_CMD_PWRUP_SHIFT 0
494
#define _MSC_CMD_PWRUP_MASK 0x1UL
495
#define _MSC_CMD_PWRUP_DEFAULT 0x00000000UL
496
#define MSC_CMD_PWRUP_DEFAULT (_MSC_CMD_PWRUP_DEFAULT << 0)
MSC_TypeDef::CACHEHITS
__I uint32_t CACHEHITS
Definition:
efm32pg1b_msc.h:59
__IO
#define __IO
Definition:
bsp_dk_bcreg_3201.h:53
MSC_TypeDef::CACHECMD
__IO uint32_t CACHECMD
Definition:
efm32pg1b_msc.h:58
MSC_TypeDef::CMD
__IO uint32_t CMD
Definition:
efm32pg1b_msc.h:68
MSC_TypeDef::LOCK
__IO uint32_t LOCK
Definition:
efm32pg1b_msc.h:57
MSC_TypeDef::IF
__I uint32_t IF
Definition:
efm32pg1b_msc.h:53
MSC_TypeDef::MASSLOCK
__IO uint32_t MASSLOCK
Definition:
efm32pg1b_msc.h:63
MSC_TypeDef::IFS
__IO uint32_t IFS
Definition:
efm32pg1b_msc.h:54
MSC_TypeDef::CACHEMISSES
__I uint32_t CACHEMISSES
Definition:
efm32pg1b_msc.h:60
MSC_TypeDef::WRITECTRL
__IO uint32_t WRITECTRL
Definition:
efm32pg1b_msc.h:45
MSC_TypeDef::IFC
__IO uint32_t IFC
Definition:
efm32pg1b_msc.h:55
MSC_TypeDef::WDATA
__IO uint32_t WDATA
Definition:
efm32pg1b_msc.h:49
MSC_TypeDef::STARTUP
__IO uint32_t STARTUP
Definition:
efm32pg1b_msc.h:65
MSC_TypeDef::ADDRB
__IO uint32_t ADDRB
Definition:
efm32pg1b_msc.h:47
MSC_TypeDef::WRITECMD
__IO uint32_t WRITECMD
Definition:
efm32pg1b_msc.h:46
MSC_TypeDef::STATUS
__I uint32_t STATUS
Definition:
efm32pg1b_msc.h:50
MSC_TypeDef::CTRL
__IO uint32_t CTRL
Definition:
efm32pg1b_msc.h:43
MSC_TypeDef
Definition:
efm32pg1b_msc.h:41
MSC_TypeDef::IEN
__IO uint32_t IEN
Definition:
efm32pg1b_msc.h:56
MSC_TypeDef::READCTRL
__IO uint32_t READCTRL
Definition:
efm32pg1b_msc.h:44
Device
SiliconLabs
EFM32PG1B
Include
efm32pg1b_msc.h
Generated on Tue Dec 8 2015 15:39:50 for EFM32 Pearl Gecko Software Documentation by
1.8.10