45 uint32_t RESERVED0[3];
48 uint32_t RESERVED1[1];
51 uint32_t RESERVED2[1];
60 uint32_t RESERVED3[5];
63 uint32_t RESERVED4[2];
66 uint32_t RESERVED5[2];
69 uint32_t RESERVED6[2];
74 uint32_t RESERVED7[1];
77 uint32_t RESERVED8[1];
85 uint32_t RESERVED9[3];
88 uint32_t RESERVED10[7];
90 uint32_t RESERVED11[1];
92 uint32_t RESERVED12[1];
95 uint32_t RESERVED13[3];
98 uint32_t RESERVED14[1];
102 uint32_t RESERVED15[1];
105 uint32_t RESERVED16[2];
107 uint32_t RESERVED17[1];
109 uint32_t RESERVED18[1];
111 uint32_t RESERVED19[3];
114 uint32_t RESERVED20[2];
117 uint32_t RESERVED21[2];
119 uint32_t RESERVED22[4];
123 uint32_t RESERVED23[2];
133 #define _CMU_CTRL_RESETVALUE 0x00300000UL
134 #define _CMU_CTRL_MASK 0x001101EFUL
135 #define _CMU_CTRL_CLKOUTSEL0_SHIFT 0
136 #define _CMU_CTRL_CLKOUTSEL0_MASK 0xFUL
137 #define _CMU_CTRL_CLKOUTSEL0_DEFAULT 0x00000000UL
138 #define _CMU_CTRL_CLKOUTSEL0_DISABLED 0x00000000UL
139 #define _CMU_CTRL_CLKOUTSEL0_ULFRCO 0x00000001UL
140 #define _CMU_CTRL_CLKOUTSEL0_LFRCO 0x00000002UL
141 #define _CMU_CTRL_CLKOUTSEL0_LFXO 0x00000003UL
142 #define _CMU_CTRL_CLKOUTSEL0_HFXO 0x00000006UL
143 #define _CMU_CTRL_CLKOUTSEL0_HFEXPCLK 0x00000007UL
144 #define _CMU_CTRL_CLKOUTSEL0_ULFRCOQ 0x00000009UL
145 #define _CMU_CTRL_CLKOUTSEL0_LFRCOQ 0x0000000AUL
146 #define _CMU_CTRL_CLKOUTSEL0_LFXOQ 0x0000000BUL
147 #define _CMU_CTRL_CLKOUTSEL0_HFRCOQ 0x0000000CUL
148 #define _CMU_CTRL_CLKOUTSEL0_AUXHFRCOQ 0x0000000DUL
149 #define _CMU_CTRL_CLKOUTSEL0_HFXOQ 0x0000000EUL
150 #define _CMU_CTRL_CLKOUTSEL0_HFSRCCLK 0x0000000FUL
151 #define CMU_CTRL_CLKOUTSEL0_DEFAULT (_CMU_CTRL_CLKOUTSEL0_DEFAULT << 0)
152 #define CMU_CTRL_CLKOUTSEL0_DISABLED (_CMU_CTRL_CLKOUTSEL0_DISABLED << 0)
153 #define CMU_CTRL_CLKOUTSEL0_ULFRCO (_CMU_CTRL_CLKOUTSEL0_ULFRCO << 0)
154 #define CMU_CTRL_CLKOUTSEL0_LFRCO (_CMU_CTRL_CLKOUTSEL0_LFRCO << 0)
155 #define CMU_CTRL_CLKOUTSEL0_LFXO (_CMU_CTRL_CLKOUTSEL0_LFXO << 0)
156 #define CMU_CTRL_CLKOUTSEL0_HFXO (_CMU_CTRL_CLKOUTSEL0_HFXO << 0)
157 #define CMU_CTRL_CLKOUTSEL0_HFEXPCLK (_CMU_CTRL_CLKOUTSEL0_HFEXPCLK << 0)
158 #define CMU_CTRL_CLKOUTSEL0_ULFRCOQ (_CMU_CTRL_CLKOUTSEL0_ULFRCOQ << 0)
159 #define CMU_CTRL_CLKOUTSEL0_LFRCOQ (_CMU_CTRL_CLKOUTSEL0_LFRCOQ << 0)
160 #define CMU_CTRL_CLKOUTSEL0_LFXOQ (_CMU_CTRL_CLKOUTSEL0_LFXOQ << 0)
161 #define CMU_CTRL_CLKOUTSEL0_HFRCOQ (_CMU_CTRL_CLKOUTSEL0_HFRCOQ << 0)
162 #define CMU_CTRL_CLKOUTSEL0_AUXHFRCOQ (_CMU_CTRL_CLKOUTSEL0_AUXHFRCOQ << 0)
163 #define CMU_CTRL_CLKOUTSEL0_HFXOQ (_CMU_CTRL_CLKOUTSEL0_HFXOQ << 0)
164 #define CMU_CTRL_CLKOUTSEL0_HFSRCCLK (_CMU_CTRL_CLKOUTSEL0_HFSRCCLK << 0)
165 #define _CMU_CTRL_CLKOUTSEL1_SHIFT 5
166 #define _CMU_CTRL_CLKOUTSEL1_MASK 0x1E0UL
167 #define _CMU_CTRL_CLKOUTSEL1_DEFAULT 0x00000000UL
168 #define _CMU_CTRL_CLKOUTSEL1_DISABLED 0x00000000UL
169 #define _CMU_CTRL_CLKOUTSEL1_ULFRCO 0x00000001UL
170 #define _CMU_CTRL_CLKOUTSEL1_LFRCO 0x00000002UL
171 #define _CMU_CTRL_CLKOUTSEL1_LFXO 0x00000003UL
172 #define _CMU_CTRL_CLKOUTSEL1_HFXO 0x00000006UL
173 #define _CMU_CTRL_CLKOUTSEL1_HFEXPCLK 0x00000007UL
174 #define _CMU_CTRL_CLKOUTSEL1_ULFRCOQ 0x00000009UL
175 #define _CMU_CTRL_CLKOUTSEL1_LFRCOQ 0x0000000AUL
176 #define _CMU_CTRL_CLKOUTSEL1_LFXOQ 0x0000000BUL
177 #define _CMU_CTRL_CLKOUTSEL1_HFRCOQ 0x0000000CUL
178 #define _CMU_CTRL_CLKOUTSEL1_AUXHFRCOQ 0x0000000DUL
179 #define _CMU_CTRL_CLKOUTSEL1_HFXOQ 0x0000000EUL
180 #define _CMU_CTRL_CLKOUTSEL1_HFSRCCLK 0x0000000FUL
181 #define CMU_CTRL_CLKOUTSEL1_DEFAULT (_CMU_CTRL_CLKOUTSEL1_DEFAULT << 5)
182 #define CMU_CTRL_CLKOUTSEL1_DISABLED (_CMU_CTRL_CLKOUTSEL1_DISABLED << 5)
183 #define CMU_CTRL_CLKOUTSEL1_ULFRCO (_CMU_CTRL_CLKOUTSEL1_ULFRCO << 5)
184 #define CMU_CTRL_CLKOUTSEL1_LFRCO (_CMU_CTRL_CLKOUTSEL1_LFRCO << 5)
185 #define CMU_CTRL_CLKOUTSEL1_LFXO (_CMU_CTRL_CLKOUTSEL1_LFXO << 5)
186 #define CMU_CTRL_CLKOUTSEL1_HFXO (_CMU_CTRL_CLKOUTSEL1_HFXO << 5)
187 #define CMU_CTRL_CLKOUTSEL1_HFEXPCLK (_CMU_CTRL_CLKOUTSEL1_HFEXPCLK << 5)
188 #define CMU_CTRL_CLKOUTSEL1_ULFRCOQ (_CMU_CTRL_CLKOUTSEL1_ULFRCOQ << 5)
189 #define CMU_CTRL_CLKOUTSEL1_LFRCOQ (_CMU_CTRL_CLKOUTSEL1_LFRCOQ << 5)
190 #define CMU_CTRL_CLKOUTSEL1_LFXOQ (_CMU_CTRL_CLKOUTSEL1_LFXOQ << 5)
191 #define CMU_CTRL_CLKOUTSEL1_HFRCOQ (_CMU_CTRL_CLKOUTSEL1_HFRCOQ << 5)
192 #define CMU_CTRL_CLKOUTSEL1_AUXHFRCOQ (_CMU_CTRL_CLKOUTSEL1_AUXHFRCOQ << 5)
193 #define CMU_CTRL_CLKOUTSEL1_HFXOQ (_CMU_CTRL_CLKOUTSEL1_HFXOQ << 5)
194 #define CMU_CTRL_CLKOUTSEL1_HFSRCCLK (_CMU_CTRL_CLKOUTSEL1_HFSRCCLK << 5)
195 #define CMU_CTRL_WSHFLE (0x1UL << 16)
196 #define _CMU_CTRL_WSHFLE_SHIFT 16
197 #define _CMU_CTRL_WSHFLE_MASK 0x10000UL
198 #define _CMU_CTRL_WSHFLE_DEFAULT 0x00000000UL
199 #define CMU_CTRL_WSHFLE_DEFAULT (_CMU_CTRL_WSHFLE_DEFAULT << 16)
200 #define CMU_CTRL_HFPERCLKEN (0x1UL << 20)
201 #define _CMU_CTRL_HFPERCLKEN_SHIFT 20
202 #define _CMU_CTRL_HFPERCLKEN_MASK 0x100000UL
203 #define _CMU_CTRL_HFPERCLKEN_DEFAULT 0x00000001UL
204 #define CMU_CTRL_HFPERCLKEN_DEFAULT (_CMU_CTRL_HFPERCLKEN_DEFAULT << 20)
207 #define _CMU_HFRCOCTRL_RESETVALUE 0xB1481F3CUL
208 #define _CMU_HFRCOCTRL_MASK 0xFFFF3F7FUL
209 #define _CMU_HFRCOCTRL_TUNING_SHIFT 0
210 #define _CMU_HFRCOCTRL_TUNING_MASK 0x7FUL
211 #define _CMU_HFRCOCTRL_TUNING_DEFAULT 0x0000003CUL
212 #define CMU_HFRCOCTRL_TUNING_DEFAULT (_CMU_HFRCOCTRL_TUNING_DEFAULT << 0)
213 #define _CMU_HFRCOCTRL_FINETUNING_SHIFT 8
214 #define _CMU_HFRCOCTRL_FINETUNING_MASK 0x3F00UL
215 #define _CMU_HFRCOCTRL_FINETUNING_DEFAULT 0x0000001FUL
216 #define CMU_HFRCOCTRL_FINETUNING_DEFAULT (_CMU_HFRCOCTRL_FINETUNING_DEFAULT << 8)
217 #define _CMU_HFRCOCTRL_FREQRANGE_SHIFT 16
218 #define _CMU_HFRCOCTRL_FREQRANGE_MASK 0x1F0000UL
219 #define _CMU_HFRCOCTRL_FREQRANGE_DEFAULT 0x00000008UL
220 #define CMU_HFRCOCTRL_FREQRANGE_DEFAULT (_CMU_HFRCOCTRL_FREQRANGE_DEFAULT << 16)
221 #define _CMU_HFRCOCTRL_CMPBIAS_SHIFT 21
222 #define _CMU_HFRCOCTRL_CMPBIAS_MASK 0xE00000UL
223 #define _CMU_HFRCOCTRL_CMPBIAS_DEFAULT 0x00000002UL
224 #define CMU_HFRCOCTRL_CMPBIAS_DEFAULT (_CMU_HFRCOCTRL_CMPBIAS_DEFAULT << 21)
225 #define CMU_HFRCOCTRL_LDOHP (0x1UL << 24)
226 #define _CMU_HFRCOCTRL_LDOHP_SHIFT 24
227 #define _CMU_HFRCOCTRL_LDOHP_MASK 0x1000000UL
228 #define _CMU_HFRCOCTRL_LDOHP_DEFAULT 0x00000001UL
229 #define CMU_HFRCOCTRL_LDOHP_DEFAULT (_CMU_HFRCOCTRL_LDOHP_DEFAULT << 24)
230 #define _CMU_HFRCOCTRL_CLKDIV_SHIFT 25
231 #define _CMU_HFRCOCTRL_CLKDIV_MASK 0x6000000UL
232 #define _CMU_HFRCOCTRL_CLKDIV_DEFAULT 0x00000000UL
233 #define _CMU_HFRCOCTRL_CLKDIV_DIV1 0x00000000UL
234 #define _CMU_HFRCOCTRL_CLKDIV_DIV2 0x00000001UL
235 #define _CMU_HFRCOCTRL_CLKDIV_DIV4 0x00000002UL
236 #define CMU_HFRCOCTRL_CLKDIV_DEFAULT (_CMU_HFRCOCTRL_CLKDIV_DEFAULT << 25)
237 #define CMU_HFRCOCTRL_CLKDIV_DIV1 (_CMU_HFRCOCTRL_CLKDIV_DIV1 << 25)
238 #define CMU_HFRCOCTRL_CLKDIV_DIV2 (_CMU_HFRCOCTRL_CLKDIV_DIV2 << 25)
239 #define CMU_HFRCOCTRL_CLKDIV_DIV4 (_CMU_HFRCOCTRL_CLKDIV_DIV4 << 25)
240 #define CMU_HFRCOCTRL_FINETUNINGEN (0x1UL << 27)
241 #define _CMU_HFRCOCTRL_FINETUNINGEN_SHIFT 27
242 #define _CMU_HFRCOCTRL_FINETUNINGEN_MASK 0x8000000UL
243 #define _CMU_HFRCOCTRL_FINETUNINGEN_DEFAULT 0x00000000UL
244 #define CMU_HFRCOCTRL_FINETUNINGEN_DEFAULT (_CMU_HFRCOCTRL_FINETUNINGEN_DEFAULT << 27)
245 #define _CMU_HFRCOCTRL_VREFTC_SHIFT 28
246 #define _CMU_HFRCOCTRL_VREFTC_MASK 0xF0000000UL
247 #define _CMU_HFRCOCTRL_VREFTC_DEFAULT 0x0000000BUL
248 #define CMU_HFRCOCTRL_VREFTC_DEFAULT (_CMU_HFRCOCTRL_VREFTC_DEFAULT << 28)
251 #define _CMU_AUXHFRCOCTRL_RESETVALUE 0xB1481F3CUL
252 #define _CMU_AUXHFRCOCTRL_MASK 0xFFFF3F7FUL
253 #define _CMU_AUXHFRCOCTRL_TUNING_SHIFT 0
254 #define _CMU_AUXHFRCOCTRL_TUNING_MASK 0x7FUL
255 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x0000003CUL
256 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0)
257 #define _CMU_AUXHFRCOCTRL_FINETUNING_SHIFT 8
258 #define _CMU_AUXHFRCOCTRL_FINETUNING_MASK 0x3F00UL
259 #define _CMU_AUXHFRCOCTRL_FINETUNING_DEFAULT 0x0000001FUL
260 #define CMU_AUXHFRCOCTRL_FINETUNING_DEFAULT (_CMU_AUXHFRCOCTRL_FINETUNING_DEFAULT << 8)
261 #define _CMU_AUXHFRCOCTRL_FREQRANGE_SHIFT 16
262 #define _CMU_AUXHFRCOCTRL_FREQRANGE_MASK 0x1F0000UL
263 #define _CMU_AUXHFRCOCTRL_FREQRANGE_DEFAULT 0x00000008UL
264 #define CMU_AUXHFRCOCTRL_FREQRANGE_DEFAULT (_CMU_AUXHFRCOCTRL_FREQRANGE_DEFAULT << 16)
265 #define _CMU_AUXHFRCOCTRL_CMPBIAS_SHIFT 21
266 #define _CMU_AUXHFRCOCTRL_CMPBIAS_MASK 0xE00000UL
267 #define _CMU_AUXHFRCOCTRL_CMPBIAS_DEFAULT 0x00000002UL
268 #define CMU_AUXHFRCOCTRL_CMPBIAS_DEFAULT (_CMU_AUXHFRCOCTRL_CMPBIAS_DEFAULT << 21)
269 #define CMU_AUXHFRCOCTRL_LDOHP (0x1UL << 24)
270 #define _CMU_AUXHFRCOCTRL_LDOHP_SHIFT 24
271 #define _CMU_AUXHFRCOCTRL_LDOHP_MASK 0x1000000UL
272 #define _CMU_AUXHFRCOCTRL_LDOHP_DEFAULT 0x00000001UL
273 #define CMU_AUXHFRCOCTRL_LDOHP_DEFAULT (_CMU_AUXHFRCOCTRL_LDOHP_DEFAULT << 24)
274 #define _CMU_AUXHFRCOCTRL_CLKDIV_SHIFT 25
275 #define _CMU_AUXHFRCOCTRL_CLKDIV_MASK 0x6000000UL
276 #define _CMU_AUXHFRCOCTRL_CLKDIV_DEFAULT 0x00000000UL
277 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL
278 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV2 0x00000001UL
279 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV4 0x00000002UL
280 #define CMU_AUXHFRCOCTRL_CLKDIV_DEFAULT (_CMU_AUXHFRCOCTRL_CLKDIV_DEFAULT << 25)
281 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25)
282 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV2 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV2 << 25)
283 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV4 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV4 << 25)
284 #define CMU_AUXHFRCOCTRL_FINETUNINGEN (0x1UL << 27)
285 #define _CMU_AUXHFRCOCTRL_FINETUNINGEN_SHIFT 27
286 #define _CMU_AUXHFRCOCTRL_FINETUNINGEN_MASK 0x8000000UL
287 #define _CMU_AUXHFRCOCTRL_FINETUNINGEN_DEFAULT 0x00000000UL
288 #define CMU_AUXHFRCOCTRL_FINETUNINGEN_DEFAULT (_CMU_AUXHFRCOCTRL_FINETUNINGEN_DEFAULT << 27)
289 #define _CMU_AUXHFRCOCTRL_VREFTC_SHIFT 28
290 #define _CMU_AUXHFRCOCTRL_VREFTC_MASK 0xF0000000UL
291 #define _CMU_AUXHFRCOCTRL_VREFTC_DEFAULT 0x0000000BUL
292 #define CMU_AUXHFRCOCTRL_VREFTC_DEFAULT (_CMU_AUXHFRCOCTRL_VREFTC_DEFAULT << 28)
295 #define _CMU_LFRCOCTRL_RESETVALUE 0x81060100UL
296 #define _CMU_LFRCOCTRL_MASK 0xF30701FFUL
297 #define _CMU_LFRCOCTRL_TUNING_SHIFT 0
298 #define _CMU_LFRCOCTRL_TUNING_MASK 0x1FFUL
299 #define _CMU_LFRCOCTRL_TUNING_DEFAULT 0x00000100UL
300 #define CMU_LFRCOCTRL_TUNING_DEFAULT (_CMU_LFRCOCTRL_TUNING_DEFAULT << 0)
301 #define CMU_LFRCOCTRL_ENVREF (0x1UL << 16)
302 #define _CMU_LFRCOCTRL_ENVREF_SHIFT 16
303 #define _CMU_LFRCOCTRL_ENVREF_MASK 0x10000UL
304 #define _CMU_LFRCOCTRL_ENVREF_DEFAULT 0x00000000UL
305 #define CMU_LFRCOCTRL_ENVREF_DEFAULT (_CMU_LFRCOCTRL_ENVREF_DEFAULT << 16)
306 #define CMU_LFRCOCTRL_ENCHOP (0x1UL << 17)
307 #define _CMU_LFRCOCTRL_ENCHOP_SHIFT 17
308 #define _CMU_LFRCOCTRL_ENCHOP_MASK 0x20000UL
309 #define _CMU_LFRCOCTRL_ENCHOP_DEFAULT 0x00000001UL
310 #define CMU_LFRCOCTRL_ENCHOP_DEFAULT (_CMU_LFRCOCTRL_ENCHOP_DEFAULT << 17)
311 #define CMU_LFRCOCTRL_ENDEM (0x1UL << 18)
312 #define _CMU_LFRCOCTRL_ENDEM_SHIFT 18
313 #define _CMU_LFRCOCTRL_ENDEM_MASK 0x40000UL
314 #define _CMU_LFRCOCTRL_ENDEM_DEFAULT 0x00000001UL
315 #define CMU_LFRCOCTRL_ENDEM_DEFAULT (_CMU_LFRCOCTRL_ENDEM_DEFAULT << 18)
316 #define _CMU_LFRCOCTRL_TIMEOUT_SHIFT 24
317 #define _CMU_LFRCOCTRL_TIMEOUT_MASK 0x3000000UL
318 #define _CMU_LFRCOCTRL_TIMEOUT_2CYCLES 0x00000000UL
319 #define _CMU_LFRCOCTRL_TIMEOUT_DEFAULT 0x00000001UL
320 #define _CMU_LFRCOCTRL_TIMEOUT_16CYCLES 0x00000001UL
321 #define _CMU_LFRCOCTRL_TIMEOUT_32CYCLES 0x00000002UL
322 #define CMU_LFRCOCTRL_TIMEOUT_2CYCLES (_CMU_LFRCOCTRL_TIMEOUT_2CYCLES << 24)
323 #define CMU_LFRCOCTRL_TIMEOUT_DEFAULT (_CMU_LFRCOCTRL_TIMEOUT_DEFAULT << 24)
324 #define CMU_LFRCOCTRL_TIMEOUT_16CYCLES (_CMU_LFRCOCTRL_TIMEOUT_16CYCLES << 24)
325 #define CMU_LFRCOCTRL_TIMEOUT_32CYCLES (_CMU_LFRCOCTRL_TIMEOUT_32CYCLES << 24)
326 #define _CMU_LFRCOCTRL_GMCCURTUNE_SHIFT 28
327 #define _CMU_LFRCOCTRL_GMCCURTUNE_MASK 0xF0000000UL
328 #define _CMU_LFRCOCTRL_GMCCURTUNE_DEFAULT 0x00000008UL
329 #define CMU_LFRCOCTRL_GMCCURTUNE_DEFAULT (_CMU_LFRCOCTRL_GMCCURTUNE_DEFAULT << 28)
332 #define _CMU_HFXOCTRL_RESETVALUE 0x00000000UL
333 #define _CMU_HFXOCTRL_MASK 0x77000F31UL
334 #define CMU_HFXOCTRL_MODE (0x1UL << 0)
335 #define _CMU_HFXOCTRL_MODE_SHIFT 0
336 #define _CMU_HFXOCTRL_MODE_MASK 0x1UL
337 #define _CMU_HFXOCTRL_MODE_DEFAULT 0x00000000UL
338 #define _CMU_HFXOCTRL_MODE_XTAL 0x00000000UL
339 #define _CMU_HFXOCTRL_MODE_EXTCLK 0x00000001UL
340 #define CMU_HFXOCTRL_MODE_DEFAULT (_CMU_HFXOCTRL_MODE_DEFAULT << 0)
341 #define CMU_HFXOCTRL_MODE_XTAL (_CMU_HFXOCTRL_MODE_XTAL << 0)
342 #define CMU_HFXOCTRL_MODE_EXTCLK (_CMU_HFXOCTRL_MODE_EXTCLK << 0)
343 #define _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_SHIFT 4
344 #define _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK 0x30UL
345 #define _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_DEFAULT 0x00000000UL
346 #define _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_AUTOCMD 0x00000000UL
347 #define _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_CMD 0x00000001UL
348 #define _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MANUAL 0x00000002UL
349 #define CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_DEFAULT (_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_DEFAULT << 4)
350 #define CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_AUTOCMD (_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_AUTOCMD << 4)
351 #define CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_CMD (_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_CMD << 4)
352 #define CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MANUAL (_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MANUAL << 4)
353 #define CMU_HFXOCTRL_LOWPOWER (0x1UL << 8)
354 #define _CMU_HFXOCTRL_LOWPOWER_SHIFT 8
355 #define _CMU_HFXOCTRL_LOWPOWER_MASK 0x100UL
356 #define _CMU_HFXOCTRL_LOWPOWER_DEFAULT 0x00000000UL
357 #define CMU_HFXOCTRL_LOWPOWER_DEFAULT (_CMU_HFXOCTRL_LOWPOWER_DEFAULT << 8)
358 #define CMU_HFXOCTRL_XTI2GND (0x1UL << 9)
359 #define _CMU_HFXOCTRL_XTI2GND_SHIFT 9
360 #define _CMU_HFXOCTRL_XTI2GND_MASK 0x200UL
361 #define _CMU_HFXOCTRL_XTI2GND_DEFAULT 0x00000000UL
362 #define CMU_HFXOCTRL_XTI2GND_DEFAULT (_CMU_HFXOCTRL_XTI2GND_DEFAULT << 9)
363 #define CMU_HFXOCTRL_XTO2GND (0x1UL << 10)
364 #define _CMU_HFXOCTRL_XTO2GND_SHIFT 10
365 #define _CMU_HFXOCTRL_XTO2GND_MASK 0x400UL
366 #define _CMU_HFXOCTRL_XTO2GND_DEFAULT 0x00000000UL
367 #define CMU_HFXOCTRL_XTO2GND_DEFAULT (_CMU_HFXOCTRL_XTO2GND_DEFAULT << 10)
368 #define CMU_HFXOCTRL_KEEPWARM (0x1UL << 11)
369 #define _CMU_HFXOCTRL_KEEPWARM_SHIFT 11
370 #define _CMU_HFXOCTRL_KEEPWARM_MASK 0x800UL
371 #define _CMU_HFXOCTRL_KEEPWARM_DEFAULT 0x00000000UL
372 #define CMU_HFXOCTRL_KEEPWARM_DEFAULT (_CMU_HFXOCTRL_KEEPWARM_DEFAULT << 11)
373 #define _CMU_HFXOCTRL_LFTIMEOUT_SHIFT 24
374 #define _CMU_HFXOCTRL_LFTIMEOUT_MASK 0x7000000UL
375 #define _CMU_HFXOCTRL_LFTIMEOUT_DEFAULT 0x00000000UL
376 #define _CMU_HFXOCTRL_LFTIMEOUT_0CYCLES 0x00000000UL
377 #define _CMU_HFXOCTRL_LFTIMEOUT_2CYCLES 0x00000001UL
378 #define _CMU_HFXOCTRL_LFTIMEOUT_4CYCLES 0x00000002UL
379 #define _CMU_HFXOCTRL_LFTIMEOUT_16CYCLES 0x00000003UL
380 #define _CMU_HFXOCTRL_LFTIMEOUT_32CYCLES 0x00000004UL
381 #define _CMU_HFXOCTRL_LFTIMEOUT_64CYCLES 0x00000005UL
382 #define _CMU_HFXOCTRL_LFTIMEOUT_1KCYCLES 0x00000006UL
383 #define _CMU_HFXOCTRL_LFTIMEOUT_4KCYCLES 0x00000007UL
384 #define CMU_HFXOCTRL_LFTIMEOUT_DEFAULT (_CMU_HFXOCTRL_LFTIMEOUT_DEFAULT << 24)
385 #define CMU_HFXOCTRL_LFTIMEOUT_0CYCLES (_CMU_HFXOCTRL_LFTIMEOUT_0CYCLES << 24)
386 #define CMU_HFXOCTRL_LFTIMEOUT_2CYCLES (_CMU_HFXOCTRL_LFTIMEOUT_2CYCLES << 24)
387 #define CMU_HFXOCTRL_LFTIMEOUT_4CYCLES (_CMU_HFXOCTRL_LFTIMEOUT_4CYCLES << 24)
388 #define CMU_HFXOCTRL_LFTIMEOUT_16CYCLES (_CMU_HFXOCTRL_LFTIMEOUT_16CYCLES << 24)
389 #define CMU_HFXOCTRL_LFTIMEOUT_32CYCLES (_CMU_HFXOCTRL_LFTIMEOUT_32CYCLES << 24)
390 #define CMU_HFXOCTRL_LFTIMEOUT_64CYCLES (_CMU_HFXOCTRL_LFTIMEOUT_64CYCLES << 24)
391 #define CMU_HFXOCTRL_LFTIMEOUT_1KCYCLES (_CMU_HFXOCTRL_LFTIMEOUT_1KCYCLES << 24)
392 #define CMU_HFXOCTRL_LFTIMEOUT_4KCYCLES (_CMU_HFXOCTRL_LFTIMEOUT_4KCYCLES << 24)
393 #define CMU_HFXOCTRL_AUTOSTARTEM0EM1 (0x1UL << 28)
394 #define _CMU_HFXOCTRL_AUTOSTARTEM0EM1_SHIFT 28
395 #define _CMU_HFXOCTRL_AUTOSTARTEM0EM1_MASK 0x10000000UL
396 #define _CMU_HFXOCTRL_AUTOSTARTEM0EM1_DEFAULT 0x00000000UL
397 #define CMU_HFXOCTRL_AUTOSTARTEM0EM1_DEFAULT (_CMU_HFXOCTRL_AUTOSTARTEM0EM1_DEFAULT << 28)
398 #define CMU_HFXOCTRL_AUTOSTARTSELEM0EM1 (0x1UL << 29)
399 #define _CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_SHIFT 29
400 #define _CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_MASK 0x20000000UL
401 #define _CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_DEFAULT 0x00000000UL
402 #define CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_DEFAULT (_CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_DEFAULT << 29)
403 #define CMU_HFXOCTRL_AUTOSTARTRDYSELRAC (0x1UL << 30)
404 #define _CMU_HFXOCTRL_AUTOSTARTRDYSELRAC_SHIFT 30
405 #define _CMU_HFXOCTRL_AUTOSTARTRDYSELRAC_MASK 0x40000000UL
406 #define _CMU_HFXOCTRL_AUTOSTARTRDYSELRAC_DEFAULT 0x00000000UL
407 #define CMU_HFXOCTRL_AUTOSTARTRDYSELRAC_DEFAULT (_CMU_HFXOCTRL_AUTOSTARTRDYSELRAC_DEFAULT << 30)
410 #define _CMU_HFXOCTRL1_RESETVALUE 0x00000240UL
411 #define _CMU_HFXOCTRL1_MASK 0x00000277UL
412 #define _CMU_HFXOCTRL1_PEAKDETTHR_SHIFT 0
413 #define _CMU_HFXOCTRL1_PEAKDETTHR_MASK 0x7UL
414 #define _CMU_HFXOCTRL1_PEAKDETTHR_DEFAULT 0x00000000UL
415 #define CMU_HFXOCTRL1_PEAKDETTHR_DEFAULT (_CMU_HFXOCTRL1_PEAKDETTHR_DEFAULT << 0)
416 #define _CMU_HFXOCTRL1_REGLVL_SHIFT 4
417 #define _CMU_HFXOCTRL1_REGLVL_MASK 0x70UL
418 #define _CMU_HFXOCTRL1_REGLVL_DEFAULT 0x00000004UL
419 #define CMU_HFXOCTRL1_REGLVL_DEFAULT (_CMU_HFXOCTRL1_REGLVL_DEFAULT << 4)
420 #define CMU_HFXOCTRL1_XTIBIASEN (0x1UL << 9)
421 #define _CMU_HFXOCTRL1_XTIBIASEN_SHIFT 9
422 #define _CMU_HFXOCTRL1_XTIBIASEN_MASK 0x200UL
423 #define _CMU_HFXOCTRL1_XTIBIASEN_DEFAULT 0x00000001UL
424 #define CMU_HFXOCTRL1_XTIBIASEN_DEFAULT (_CMU_HFXOCTRL1_XTIBIASEN_DEFAULT << 9)
427 #define _CMU_HFXOSTARTUPCTRL_RESETVALUE 0xA1250060UL
428 #define _CMU_HFXOSTARTUPCTRL_MASK 0xFFEFF87FUL
429 #define _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_SHIFT 0
430 #define _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_MASK 0x7FUL
431 #define _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT 0x00000060UL
432 #define CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT (_CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT << 0)
433 #define _CMU_HFXOSTARTUPCTRL_CTUNE_SHIFT 11
434 #define _CMU_HFXOSTARTUPCTRL_CTUNE_MASK 0xFF800UL
435 #define _CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT 0x000000A0UL
436 #define CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT (_CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT << 11)
437 #define _CMU_HFXOSTARTUPCTRL_IBTRIMXOCOREWARM_SHIFT 21
438 #define _CMU_HFXOSTARTUPCTRL_IBTRIMXOCOREWARM_MASK 0xFE00000UL
439 #define _CMU_HFXOSTARTUPCTRL_IBTRIMXOCOREWARM_DEFAULT 0x00000009UL
440 #define CMU_HFXOSTARTUPCTRL_IBTRIMXOCOREWARM_DEFAULT (_CMU_HFXOSTARTUPCTRL_IBTRIMXOCOREWARM_DEFAULT << 21)
441 #define _CMU_HFXOSTARTUPCTRL_REGISHWARM_SHIFT 28
442 #define _CMU_HFXOSTARTUPCTRL_REGISHWARM_MASK 0xF0000000UL
443 #define _CMU_HFXOSTARTUPCTRL_REGISHWARM_DEFAULT 0x0000000AUL
444 #define CMU_HFXOSTARTUPCTRL_REGISHWARM_DEFAULT (_CMU_HFXOSTARTUPCTRL_REGISHWARM_DEFAULT << 28)
447 #define _CMU_HFXOSTEADYSTATECTRL_RESETVALUE 0xA30AAD09UL
448 #define _CMU_HFXOSTEADYSTATECTRL_MASK 0xF70FFFFFUL
449 #define _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_SHIFT 0
450 #define _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK 0x7FUL
451 #define _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_DEFAULT 0x00000009UL
452 #define CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_DEFAULT (_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_DEFAULT << 0)
453 #define _CMU_HFXOSTEADYSTATECTRL_REGISH_SHIFT 7
454 #define _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK 0x780UL
455 #define _CMU_HFXOSTEADYSTATECTRL_REGISH_DEFAULT 0x0000000AUL
456 #define CMU_HFXOSTEADYSTATECTRL_REGISH_DEFAULT (_CMU_HFXOSTEADYSTATECTRL_REGISH_DEFAULT << 7)
457 #define _CMU_HFXOSTEADYSTATECTRL_CTUNE_SHIFT 11
458 #define _CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK 0xFF800UL
459 #define _CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT 0x00000155UL
460 #define CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT (_CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT << 11)
461 #define _CMU_HFXOSTEADYSTATECTRL_REGSELILOW_SHIFT 24
462 #define _CMU_HFXOSTEADYSTATECTRL_REGSELILOW_MASK 0x3000000UL
463 #define _CMU_HFXOSTEADYSTATECTRL_REGSELILOW_DEFAULT 0x00000003UL
464 #define CMU_HFXOSTEADYSTATECTRL_REGSELILOW_DEFAULT (_CMU_HFXOSTEADYSTATECTRL_REGSELILOW_DEFAULT << 24)
465 #define CMU_HFXOSTEADYSTATECTRL_PEAKDETEN (0x1UL << 26)
466 #define _CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_SHIFT 26
467 #define _CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_MASK 0x4000000UL
468 #define _CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_DEFAULT 0x00000000UL
469 #define CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_DEFAULT (_CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_DEFAULT << 26)
470 #define _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_SHIFT 28
471 #define _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_MASK 0xF0000000UL
472 #define _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_DEFAULT 0x0000000AUL
473 #define CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_DEFAULT (_CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_DEFAULT << 28)
476 #define _CMU_HFXOTIMEOUTCTRL_RESETVALUE 0x00026667UL
477 #define _CMU_HFXOTIMEOUTCTRL_MASK 0x000FFFFFUL
478 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_SHIFT 0
479 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_MASK 0xFUL
480 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2CYCLES 0x00000000UL
481 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4CYCLES 0x00000001UL
482 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16CYCLES 0x00000002UL
483 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32CYCLES 0x00000003UL
484 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_256CYCLES 0x00000004UL
485 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_1KCYCLES 0x00000005UL
486 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2KCYCLES 0x00000006UL
487 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT 0x00000007UL
488 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4KCYCLES 0x00000007UL
489 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_8KCYCLES 0x00000008UL
490 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16KCYCLES 0x00000009UL
491 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32KCYCLES 0x0000000AUL
492 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2CYCLES (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2CYCLES << 0)
493 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4CYCLES (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4CYCLES << 0)
494 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16CYCLES (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16CYCLES << 0)
495 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32CYCLES (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32CYCLES << 0)
496 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_256CYCLES (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_256CYCLES << 0)
497 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_1KCYCLES (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_1KCYCLES << 0)
498 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2KCYCLES (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2KCYCLES << 0)
499 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT << 0)
500 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4KCYCLES (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4KCYCLES << 0)
501 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_8KCYCLES (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_8KCYCLES << 0)
502 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16KCYCLES (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16KCYCLES << 0)
503 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32KCYCLES (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32KCYCLES << 0)
504 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_SHIFT 4
505 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_MASK 0xF0UL
506 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2CYCLES 0x00000000UL
507 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4CYCLES 0x00000001UL
508 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16CYCLES 0x00000002UL
509 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32CYCLES 0x00000003UL
510 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_256CYCLES 0x00000004UL
511 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_1KCYCLES 0x00000005UL
512 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_DEFAULT 0x00000006UL
513 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2KCYCLES 0x00000006UL
514 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4KCYCLES 0x00000007UL
515 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_8KCYCLES 0x00000008UL
516 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16KCYCLES 0x00000009UL
517 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32KCYCLES 0x0000000AUL
518 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2CYCLES (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2CYCLES << 4)
519 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4CYCLES (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4CYCLES << 4)
520 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16CYCLES (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16CYCLES << 4)
521 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32CYCLES (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32CYCLES << 4)
522 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_256CYCLES (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_256CYCLES << 4)
523 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_1KCYCLES (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_1KCYCLES << 4)
524 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_DEFAULT (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_DEFAULT << 4)
525 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2KCYCLES (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2KCYCLES << 4)
526 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4KCYCLES (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4KCYCLES << 4)
527 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_8KCYCLES (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_8KCYCLES << 4)
528 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16KCYCLES (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16KCYCLES << 4)
529 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32KCYCLES (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32KCYCLES << 4)
530 #define _CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_SHIFT 8
531 #define _CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_MASK 0xF00UL
532 #define _CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_2CYCLES 0x00000000UL
533 #define _CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_4CYCLES 0x00000001UL
534 #define _CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_16CYCLES 0x00000002UL
535 #define _CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_32CYCLES 0x00000003UL
536 #define _CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_256CYCLES 0x00000004UL
537 #define _CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_1KCYCLES 0x00000005UL
538 #define _CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_DEFAULT 0x00000006UL
539 #define _CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_2KCYCLES 0x00000006UL
540 #define _CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_4KCYCLES 0x00000007UL
541 #define _CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_8KCYCLES 0x00000008UL
542 #define _CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_16KCYCLES 0x00000009UL
543 #define _CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_32KCYCLES 0x0000000AUL
544 #define CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_2CYCLES (_CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_2CYCLES << 8)
545 #define CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_4CYCLES (_CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_4CYCLES << 8)
546 #define CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_16CYCLES (_CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_16CYCLES << 8)
547 #define CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_32CYCLES (_CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_32CYCLES << 8)
548 #define CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_256CYCLES (_CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_256CYCLES << 8)
549 #define CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_1KCYCLES (_CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_1KCYCLES << 8)
550 #define CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_DEFAULT (_CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_DEFAULT << 8)
551 #define CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_2KCYCLES (_CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_2KCYCLES << 8)
552 #define CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_4KCYCLES (_CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_4KCYCLES << 8)
553 #define CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_8KCYCLES (_CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_8KCYCLES << 8)
554 #define CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_16KCYCLES (_CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_16KCYCLES << 8)
555 #define CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_32KCYCLES (_CMU_HFXOTIMEOUTCTRL_WARMSTEADYTIMEOUT_32KCYCLES << 8)
556 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_SHIFT 12
557 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_MASK 0xF000UL
558 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2CYCLES 0x00000000UL
559 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4CYCLES 0x00000001UL
560 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16CYCLES 0x00000002UL
561 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32CYCLES 0x00000003UL
562 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_256CYCLES 0x00000004UL
563 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_1KCYCLES 0x00000005UL
564 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_DEFAULT 0x00000006UL
565 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2KCYCLES 0x00000006UL
566 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4KCYCLES 0x00000007UL
567 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_8KCYCLES 0x00000008UL
568 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16KCYCLES 0x00000009UL
569 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32KCYCLES 0x0000000AUL
570 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2CYCLES (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2CYCLES << 12)
571 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4CYCLES (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4CYCLES << 12)
572 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16CYCLES (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16CYCLES << 12)
573 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32CYCLES (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32CYCLES << 12)
574 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_256CYCLES (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_256CYCLES << 12)
575 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_1KCYCLES (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_1KCYCLES << 12)
576 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_DEFAULT (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_DEFAULT << 12)
577 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2KCYCLES (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2KCYCLES << 12)
578 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4KCYCLES (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4KCYCLES << 12)
579 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_8KCYCLES (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_8KCYCLES << 12)
580 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16KCYCLES (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16KCYCLES << 12)
581 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32KCYCLES (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32KCYCLES << 12)
582 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_SHIFT 16
583 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_MASK 0xF0000UL
584 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_2CYCLES 0x00000000UL
585 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_4CYCLES 0x00000001UL
586 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_DEFAULT 0x00000002UL
587 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_16CYCLES 0x00000002UL
588 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_32CYCLES 0x00000003UL
589 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_256CYCLES 0x00000004UL
590 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_1KCYCLES 0x00000005UL
591 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_2KCYCLES 0x00000006UL
592 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_4KCYCLES 0x00000007UL
593 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_8KCYCLES 0x00000008UL
594 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_16KCYCLES 0x00000009UL
595 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_32KCYCLES 0x0000000AUL
596 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_2CYCLES (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_2CYCLES << 16)
597 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_4CYCLES (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_4CYCLES << 16)
598 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_DEFAULT (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_DEFAULT << 16)
599 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_16CYCLES (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_16CYCLES << 16)
600 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_32CYCLES (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_32CYCLES << 16)
601 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_256CYCLES (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_256CYCLES << 16)
602 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_1KCYCLES (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_1KCYCLES << 16)
603 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_2KCYCLES (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_2KCYCLES << 16)
604 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_4KCYCLES (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_4KCYCLES << 16)
605 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_8KCYCLES (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_8KCYCLES << 16)
606 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_16KCYCLES (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_16KCYCLES << 16)
607 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_32KCYCLES (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_32KCYCLES << 16)
610 #define _CMU_LFXOCTRL_RESETVALUE 0x07009000UL
611 #define _CMU_LFXOCTRL_MASK 0x0713DB7FUL
612 #define _CMU_LFXOCTRL_TUNING_SHIFT 0
613 #define _CMU_LFXOCTRL_TUNING_MASK 0x7FUL
614 #define _CMU_LFXOCTRL_TUNING_DEFAULT 0x00000000UL
615 #define CMU_LFXOCTRL_TUNING_DEFAULT (_CMU_LFXOCTRL_TUNING_DEFAULT << 0)
616 #define _CMU_LFXOCTRL_MODE_SHIFT 8
617 #define _CMU_LFXOCTRL_MODE_MASK 0x300UL
618 #define _CMU_LFXOCTRL_MODE_DEFAULT 0x00000000UL
619 #define _CMU_LFXOCTRL_MODE_XTAL 0x00000000UL
620 #define _CMU_LFXOCTRL_MODE_BUFEXTCLK 0x00000001UL
621 #define _CMU_LFXOCTRL_MODE_DIGEXTCLK 0x00000002UL
622 #define CMU_LFXOCTRL_MODE_DEFAULT (_CMU_LFXOCTRL_MODE_DEFAULT << 8)
623 #define CMU_LFXOCTRL_MODE_XTAL (_CMU_LFXOCTRL_MODE_XTAL << 8)
624 #define CMU_LFXOCTRL_MODE_BUFEXTCLK (_CMU_LFXOCTRL_MODE_BUFEXTCLK << 8)
625 #define CMU_LFXOCTRL_MODE_DIGEXTCLK (_CMU_LFXOCTRL_MODE_DIGEXTCLK << 8)
626 #define _CMU_LFXOCTRL_GAIN_SHIFT 11
627 #define _CMU_LFXOCTRL_GAIN_MASK 0x1800UL
628 #define _CMU_LFXOCTRL_GAIN_DEFAULT 0x00000002UL
629 #define CMU_LFXOCTRL_GAIN_DEFAULT (_CMU_LFXOCTRL_GAIN_DEFAULT << 11)
630 #define CMU_LFXOCTRL_HIGHAMPL (0x1UL << 14)
631 #define _CMU_LFXOCTRL_HIGHAMPL_SHIFT 14
632 #define _CMU_LFXOCTRL_HIGHAMPL_MASK 0x4000UL
633 #define _CMU_LFXOCTRL_HIGHAMPL_DEFAULT 0x00000000UL
634 #define CMU_LFXOCTRL_HIGHAMPL_DEFAULT (_CMU_LFXOCTRL_HIGHAMPL_DEFAULT << 14)
635 #define CMU_LFXOCTRL_AGC (0x1UL << 15)
636 #define _CMU_LFXOCTRL_AGC_SHIFT 15
637 #define _CMU_LFXOCTRL_AGC_MASK 0x8000UL
638 #define _CMU_LFXOCTRL_AGC_DEFAULT 0x00000001UL
639 #define CMU_LFXOCTRL_AGC_DEFAULT (_CMU_LFXOCTRL_AGC_DEFAULT << 15)
640 #define _CMU_LFXOCTRL_CUR_SHIFT 16
641 #define _CMU_LFXOCTRL_CUR_MASK 0x30000UL
642 #define _CMU_LFXOCTRL_CUR_DEFAULT 0x00000000UL
643 #define CMU_LFXOCTRL_CUR_DEFAULT (_CMU_LFXOCTRL_CUR_DEFAULT << 16)
644 #define CMU_LFXOCTRL_BUFCUR (0x1UL << 20)
645 #define _CMU_LFXOCTRL_BUFCUR_SHIFT 20
646 #define _CMU_LFXOCTRL_BUFCUR_MASK 0x100000UL
647 #define _CMU_LFXOCTRL_BUFCUR_DEFAULT 0x00000000UL
648 #define CMU_LFXOCTRL_BUFCUR_DEFAULT (_CMU_LFXOCTRL_BUFCUR_DEFAULT << 20)
649 #define _CMU_LFXOCTRL_TIMEOUT_SHIFT 24
650 #define _CMU_LFXOCTRL_TIMEOUT_MASK 0x7000000UL
651 #define _CMU_LFXOCTRL_TIMEOUT_2CYCLES 0x00000000UL
652 #define _CMU_LFXOCTRL_TIMEOUT_256CYCLES 0x00000001UL
653 #define _CMU_LFXOCTRL_TIMEOUT_1KCYCLES 0x00000002UL
654 #define _CMU_LFXOCTRL_TIMEOUT_2KCYCLES 0x00000003UL
655 #define _CMU_LFXOCTRL_TIMEOUT_4KCYCLES 0x00000004UL
656 #define _CMU_LFXOCTRL_TIMEOUT_8KCYCLES 0x00000005UL
657 #define _CMU_LFXOCTRL_TIMEOUT_16KCYCLES 0x00000006UL
658 #define _CMU_LFXOCTRL_TIMEOUT_DEFAULT 0x00000007UL
659 #define _CMU_LFXOCTRL_TIMEOUT_32KCYCLES 0x00000007UL
660 #define CMU_LFXOCTRL_TIMEOUT_2CYCLES (_CMU_LFXOCTRL_TIMEOUT_2CYCLES << 24)
661 #define CMU_LFXOCTRL_TIMEOUT_256CYCLES (_CMU_LFXOCTRL_TIMEOUT_256CYCLES << 24)
662 #define CMU_LFXOCTRL_TIMEOUT_1KCYCLES (_CMU_LFXOCTRL_TIMEOUT_1KCYCLES << 24)
663 #define CMU_LFXOCTRL_TIMEOUT_2KCYCLES (_CMU_LFXOCTRL_TIMEOUT_2KCYCLES << 24)
664 #define CMU_LFXOCTRL_TIMEOUT_4KCYCLES (_CMU_LFXOCTRL_TIMEOUT_4KCYCLES << 24)
665 #define CMU_LFXOCTRL_TIMEOUT_8KCYCLES (_CMU_LFXOCTRL_TIMEOUT_8KCYCLES << 24)
666 #define CMU_LFXOCTRL_TIMEOUT_16KCYCLES (_CMU_LFXOCTRL_TIMEOUT_16KCYCLES << 24)
667 #define CMU_LFXOCTRL_TIMEOUT_DEFAULT (_CMU_LFXOCTRL_TIMEOUT_DEFAULT << 24)
668 #define CMU_LFXOCTRL_TIMEOUT_32KCYCLES (_CMU_LFXOCTRL_TIMEOUT_32KCYCLES << 24)
671 #define _CMU_CALCTRL_RESETVALUE 0x00000000UL
672 #define _CMU_CALCTRL_MASK 0x0F0F0177UL
673 #define _CMU_CALCTRL_UPSEL_SHIFT 0
674 #define _CMU_CALCTRL_UPSEL_MASK 0x7UL
675 #define _CMU_CALCTRL_UPSEL_DEFAULT 0x00000000UL
676 #define _CMU_CALCTRL_UPSEL_HFXO 0x00000000UL
677 #define _CMU_CALCTRL_UPSEL_LFXO 0x00000001UL
678 #define _CMU_CALCTRL_UPSEL_HFRCO 0x00000002UL
679 #define _CMU_CALCTRL_UPSEL_LFRCO 0x00000003UL
680 #define _CMU_CALCTRL_UPSEL_AUXHFRCO 0x00000004UL
681 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL
682 #define CMU_CALCTRL_UPSEL_DEFAULT (_CMU_CALCTRL_UPSEL_DEFAULT << 0)
683 #define CMU_CALCTRL_UPSEL_HFXO (_CMU_CALCTRL_UPSEL_HFXO << 0)
684 #define CMU_CALCTRL_UPSEL_LFXO (_CMU_CALCTRL_UPSEL_LFXO << 0)
685 #define CMU_CALCTRL_UPSEL_HFRCO (_CMU_CALCTRL_UPSEL_HFRCO << 0)
686 #define CMU_CALCTRL_UPSEL_LFRCO (_CMU_CALCTRL_UPSEL_LFRCO << 0)
687 #define CMU_CALCTRL_UPSEL_AUXHFRCO (_CMU_CALCTRL_UPSEL_AUXHFRCO << 0)
688 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0)
689 #define _CMU_CALCTRL_DOWNSEL_SHIFT 4
690 #define _CMU_CALCTRL_DOWNSEL_MASK 0x70UL
691 #define _CMU_CALCTRL_DOWNSEL_DEFAULT 0x00000000UL
692 #define _CMU_CALCTRL_DOWNSEL_HFCLK 0x00000000UL
693 #define _CMU_CALCTRL_DOWNSEL_HFXO 0x00000001UL
694 #define _CMU_CALCTRL_DOWNSEL_LFXO 0x00000002UL
695 #define _CMU_CALCTRL_DOWNSEL_HFRCO 0x00000003UL
696 #define _CMU_CALCTRL_DOWNSEL_LFRCO 0x00000004UL
697 #define _CMU_CALCTRL_DOWNSEL_AUXHFRCO 0x00000005UL
698 #define _CMU_CALCTRL_DOWNSEL_PRS 0x00000006UL
699 #define CMU_CALCTRL_DOWNSEL_DEFAULT (_CMU_CALCTRL_DOWNSEL_DEFAULT << 4)
700 #define CMU_CALCTRL_DOWNSEL_HFCLK (_CMU_CALCTRL_DOWNSEL_HFCLK << 4)
701 #define CMU_CALCTRL_DOWNSEL_HFXO (_CMU_CALCTRL_DOWNSEL_HFXO << 4)
702 #define CMU_CALCTRL_DOWNSEL_LFXO (_CMU_CALCTRL_DOWNSEL_LFXO << 4)
703 #define CMU_CALCTRL_DOWNSEL_HFRCO (_CMU_CALCTRL_DOWNSEL_HFRCO << 4)
704 #define CMU_CALCTRL_DOWNSEL_LFRCO (_CMU_CALCTRL_DOWNSEL_LFRCO << 4)
705 #define CMU_CALCTRL_DOWNSEL_AUXHFRCO (_CMU_CALCTRL_DOWNSEL_AUXHFRCO << 4)
706 #define CMU_CALCTRL_DOWNSEL_PRS (_CMU_CALCTRL_DOWNSEL_PRS << 4)
707 #define CMU_CALCTRL_CONT (0x1UL << 8)
708 #define _CMU_CALCTRL_CONT_SHIFT 8
709 #define _CMU_CALCTRL_CONT_MASK 0x100UL
710 #define _CMU_CALCTRL_CONT_DEFAULT 0x00000000UL
711 #define CMU_CALCTRL_CONT_DEFAULT (_CMU_CALCTRL_CONT_DEFAULT << 8)
712 #define _CMU_CALCTRL_PRSUPSEL_SHIFT 16
713 #define _CMU_CALCTRL_PRSUPSEL_MASK 0xF0000UL
714 #define _CMU_CALCTRL_PRSUPSEL_DEFAULT 0x00000000UL
715 #define _CMU_CALCTRL_PRSUPSEL_PRSCH0 0x00000000UL
716 #define _CMU_CALCTRL_PRSUPSEL_PRSCH1 0x00000001UL
717 #define _CMU_CALCTRL_PRSUPSEL_PRSCH2 0x00000002UL
718 #define _CMU_CALCTRL_PRSUPSEL_PRSCH3 0x00000003UL
719 #define _CMU_CALCTRL_PRSUPSEL_PRSCH4 0x00000004UL
720 #define _CMU_CALCTRL_PRSUPSEL_PRSCH5 0x00000005UL
721 #define _CMU_CALCTRL_PRSUPSEL_PRSCH6 0x00000006UL
722 #define _CMU_CALCTRL_PRSUPSEL_PRSCH7 0x00000007UL
723 #define _CMU_CALCTRL_PRSUPSEL_PRSCH8 0x00000008UL
724 #define _CMU_CALCTRL_PRSUPSEL_PRSCH9 0x00000009UL
725 #define _CMU_CALCTRL_PRSUPSEL_PRSCH10 0x0000000AUL
726 #define _CMU_CALCTRL_PRSUPSEL_PRSCH11 0x0000000BUL
727 #define CMU_CALCTRL_PRSUPSEL_DEFAULT (_CMU_CALCTRL_PRSUPSEL_DEFAULT << 16)
728 #define CMU_CALCTRL_PRSUPSEL_PRSCH0 (_CMU_CALCTRL_PRSUPSEL_PRSCH0 << 16)
729 #define CMU_CALCTRL_PRSUPSEL_PRSCH1 (_CMU_CALCTRL_PRSUPSEL_PRSCH1 << 16)
730 #define CMU_CALCTRL_PRSUPSEL_PRSCH2 (_CMU_CALCTRL_PRSUPSEL_PRSCH2 << 16)
731 #define CMU_CALCTRL_PRSUPSEL_PRSCH3 (_CMU_CALCTRL_PRSUPSEL_PRSCH3 << 16)
732 #define CMU_CALCTRL_PRSUPSEL_PRSCH4 (_CMU_CALCTRL_PRSUPSEL_PRSCH4 << 16)
733 #define CMU_CALCTRL_PRSUPSEL_PRSCH5 (_CMU_CALCTRL_PRSUPSEL_PRSCH5 << 16)
734 #define CMU_CALCTRL_PRSUPSEL_PRSCH6 (_CMU_CALCTRL_PRSUPSEL_PRSCH6 << 16)
735 #define CMU_CALCTRL_PRSUPSEL_PRSCH7 (_CMU_CALCTRL_PRSUPSEL_PRSCH7 << 16)
736 #define CMU_CALCTRL_PRSUPSEL_PRSCH8 (_CMU_CALCTRL_PRSUPSEL_PRSCH8 << 16)
737 #define CMU_CALCTRL_PRSUPSEL_PRSCH9 (_CMU_CALCTRL_PRSUPSEL_PRSCH9 << 16)
738 #define CMU_CALCTRL_PRSUPSEL_PRSCH10 (_CMU_CALCTRL_PRSUPSEL_PRSCH10 << 16)
739 #define CMU_CALCTRL_PRSUPSEL_PRSCH11 (_CMU_CALCTRL_PRSUPSEL_PRSCH11 << 16)
740 #define _CMU_CALCTRL_PRSDOWNSEL_SHIFT 24
741 #define _CMU_CALCTRL_PRSDOWNSEL_MASK 0xF000000UL
742 #define _CMU_CALCTRL_PRSDOWNSEL_DEFAULT 0x00000000UL
743 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH0 0x00000000UL
744 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH1 0x00000001UL
745 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH2 0x00000002UL
746 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH3 0x00000003UL
747 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH4 0x00000004UL
748 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH5 0x00000005UL
749 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH6 0x00000006UL
750 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH7 0x00000007UL
751 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH8 0x00000008UL
752 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH9 0x00000009UL
753 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH10 0x0000000AUL
754 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH11 0x0000000BUL
755 #define CMU_CALCTRL_PRSDOWNSEL_DEFAULT (_CMU_CALCTRL_PRSDOWNSEL_DEFAULT << 24)
756 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH0 (_CMU_CALCTRL_PRSDOWNSEL_PRSCH0 << 24)
757 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH1 (_CMU_CALCTRL_PRSDOWNSEL_PRSCH1 << 24)
758 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH2 (_CMU_CALCTRL_PRSDOWNSEL_PRSCH2 << 24)
759 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH3 (_CMU_CALCTRL_PRSDOWNSEL_PRSCH3 << 24)
760 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH4 (_CMU_CALCTRL_PRSDOWNSEL_PRSCH4 << 24)
761 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH5 (_CMU_CALCTRL_PRSDOWNSEL_PRSCH5 << 24)
762 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH6 (_CMU_CALCTRL_PRSDOWNSEL_PRSCH6 << 24)
763 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH7 (_CMU_CALCTRL_PRSDOWNSEL_PRSCH7 << 24)
764 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH8 (_CMU_CALCTRL_PRSDOWNSEL_PRSCH8 << 24)
765 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH9 (_CMU_CALCTRL_PRSDOWNSEL_PRSCH9 << 24)
766 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH10 (_CMU_CALCTRL_PRSDOWNSEL_PRSCH10 << 24)
767 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH11 (_CMU_CALCTRL_PRSDOWNSEL_PRSCH11 << 24)
770 #define _CMU_CALCNT_RESETVALUE 0x00000000UL
771 #define _CMU_CALCNT_MASK 0x000FFFFFUL
772 #define _CMU_CALCNT_CALCNT_SHIFT 0
773 #define _CMU_CALCNT_CALCNT_MASK 0xFFFFFUL
774 #define _CMU_CALCNT_CALCNT_DEFAULT 0x00000000UL
775 #define CMU_CALCNT_CALCNT_DEFAULT (_CMU_CALCNT_CALCNT_DEFAULT << 0)
778 #define _CMU_OSCENCMD_RESETVALUE 0x00000000UL
779 #define _CMU_OSCENCMD_MASK 0x000003FFUL
780 #define CMU_OSCENCMD_HFRCOEN (0x1UL << 0)
781 #define _CMU_OSCENCMD_HFRCOEN_SHIFT 0
782 #define _CMU_OSCENCMD_HFRCOEN_MASK 0x1UL
783 #define _CMU_OSCENCMD_HFRCOEN_DEFAULT 0x00000000UL
784 #define CMU_OSCENCMD_HFRCOEN_DEFAULT (_CMU_OSCENCMD_HFRCOEN_DEFAULT << 0)
785 #define CMU_OSCENCMD_HFRCODIS (0x1UL << 1)
786 #define _CMU_OSCENCMD_HFRCODIS_SHIFT 1
787 #define _CMU_OSCENCMD_HFRCODIS_MASK 0x2UL
788 #define _CMU_OSCENCMD_HFRCODIS_DEFAULT 0x00000000UL
789 #define CMU_OSCENCMD_HFRCODIS_DEFAULT (_CMU_OSCENCMD_HFRCODIS_DEFAULT << 1)
790 #define CMU_OSCENCMD_HFXOEN (0x1UL << 2)
791 #define _CMU_OSCENCMD_HFXOEN_SHIFT 2
792 #define _CMU_OSCENCMD_HFXOEN_MASK 0x4UL
793 #define _CMU_OSCENCMD_HFXOEN_DEFAULT 0x00000000UL
794 #define CMU_OSCENCMD_HFXOEN_DEFAULT (_CMU_OSCENCMD_HFXOEN_DEFAULT << 2)
795 #define CMU_OSCENCMD_HFXODIS (0x1UL << 3)
796 #define _CMU_OSCENCMD_HFXODIS_SHIFT 3
797 #define _CMU_OSCENCMD_HFXODIS_MASK 0x8UL
798 #define _CMU_OSCENCMD_HFXODIS_DEFAULT 0x00000000UL
799 #define CMU_OSCENCMD_HFXODIS_DEFAULT (_CMU_OSCENCMD_HFXODIS_DEFAULT << 3)
800 #define CMU_OSCENCMD_AUXHFRCOEN (0x1UL << 4)
801 #define _CMU_OSCENCMD_AUXHFRCOEN_SHIFT 4
802 #define _CMU_OSCENCMD_AUXHFRCOEN_MASK 0x10UL
803 #define _CMU_OSCENCMD_AUXHFRCOEN_DEFAULT 0x00000000UL
804 #define CMU_OSCENCMD_AUXHFRCOEN_DEFAULT (_CMU_OSCENCMD_AUXHFRCOEN_DEFAULT << 4)
805 #define CMU_OSCENCMD_AUXHFRCODIS (0x1UL << 5)
806 #define _CMU_OSCENCMD_AUXHFRCODIS_SHIFT 5
807 #define _CMU_OSCENCMD_AUXHFRCODIS_MASK 0x20UL
808 #define _CMU_OSCENCMD_AUXHFRCODIS_DEFAULT 0x00000000UL
809 #define CMU_OSCENCMD_AUXHFRCODIS_DEFAULT (_CMU_OSCENCMD_AUXHFRCODIS_DEFAULT << 5)
810 #define CMU_OSCENCMD_LFRCOEN (0x1UL << 6)
811 #define _CMU_OSCENCMD_LFRCOEN_SHIFT 6
812 #define _CMU_OSCENCMD_LFRCOEN_MASK 0x40UL
813 #define _CMU_OSCENCMD_LFRCOEN_DEFAULT 0x00000000UL
814 #define CMU_OSCENCMD_LFRCOEN_DEFAULT (_CMU_OSCENCMD_LFRCOEN_DEFAULT << 6)
815 #define CMU_OSCENCMD_LFRCODIS (0x1UL << 7)
816 #define _CMU_OSCENCMD_LFRCODIS_SHIFT 7
817 #define _CMU_OSCENCMD_LFRCODIS_MASK 0x80UL
818 #define _CMU_OSCENCMD_LFRCODIS_DEFAULT 0x00000000UL
819 #define CMU_OSCENCMD_LFRCODIS_DEFAULT (_CMU_OSCENCMD_LFRCODIS_DEFAULT << 7)
820 #define CMU_OSCENCMD_LFXOEN (0x1UL << 8)
821 #define _CMU_OSCENCMD_LFXOEN_SHIFT 8
822 #define _CMU_OSCENCMD_LFXOEN_MASK 0x100UL
823 #define _CMU_OSCENCMD_LFXOEN_DEFAULT 0x00000000UL
824 #define CMU_OSCENCMD_LFXOEN_DEFAULT (_CMU_OSCENCMD_LFXOEN_DEFAULT << 8)
825 #define CMU_OSCENCMD_LFXODIS (0x1UL << 9)
826 #define _CMU_OSCENCMD_LFXODIS_SHIFT 9
827 #define _CMU_OSCENCMD_LFXODIS_MASK 0x200UL
828 #define _CMU_OSCENCMD_LFXODIS_DEFAULT 0x00000000UL
829 #define CMU_OSCENCMD_LFXODIS_DEFAULT (_CMU_OSCENCMD_LFXODIS_DEFAULT << 9)
832 #define _CMU_CMD_RESETVALUE 0x00000000UL
833 #define _CMU_CMD_MASK 0x00000033UL
834 #define CMU_CMD_CALSTART (0x1UL << 0)
835 #define _CMU_CMD_CALSTART_SHIFT 0
836 #define _CMU_CMD_CALSTART_MASK 0x1UL
837 #define _CMU_CMD_CALSTART_DEFAULT 0x00000000UL
838 #define CMU_CMD_CALSTART_DEFAULT (_CMU_CMD_CALSTART_DEFAULT << 0)
839 #define CMU_CMD_CALSTOP (0x1UL << 1)
840 #define _CMU_CMD_CALSTOP_SHIFT 1
841 #define _CMU_CMD_CALSTOP_MASK 0x2UL
842 #define _CMU_CMD_CALSTOP_DEFAULT 0x00000000UL
843 #define CMU_CMD_CALSTOP_DEFAULT (_CMU_CMD_CALSTOP_DEFAULT << 1)
844 #define CMU_CMD_HFXOPEAKDETSTART (0x1UL << 4)
845 #define _CMU_CMD_HFXOPEAKDETSTART_SHIFT 4
846 #define _CMU_CMD_HFXOPEAKDETSTART_MASK 0x10UL
847 #define _CMU_CMD_HFXOPEAKDETSTART_DEFAULT 0x00000000UL
848 #define CMU_CMD_HFXOPEAKDETSTART_DEFAULT (_CMU_CMD_HFXOPEAKDETSTART_DEFAULT << 4)
849 #define CMU_CMD_HFXOSHUNTOPTSTART (0x1UL << 5)
850 #define _CMU_CMD_HFXOSHUNTOPTSTART_SHIFT 5
851 #define _CMU_CMD_HFXOSHUNTOPTSTART_MASK 0x20UL
852 #define _CMU_CMD_HFXOSHUNTOPTSTART_DEFAULT 0x00000000UL
853 #define CMU_CMD_HFXOSHUNTOPTSTART_DEFAULT (_CMU_CMD_HFXOSHUNTOPTSTART_DEFAULT << 5)
856 #define _CMU_DBGCLKSEL_RESETVALUE 0x00000000UL
857 #define _CMU_DBGCLKSEL_MASK 0x00000001UL
858 #define _CMU_DBGCLKSEL_DBG_SHIFT 0
859 #define _CMU_DBGCLKSEL_DBG_MASK 0x1UL
860 #define _CMU_DBGCLKSEL_DBG_DEFAULT 0x00000000UL
861 #define _CMU_DBGCLKSEL_DBG_AUXHFRCO 0x00000000UL
862 #define _CMU_DBGCLKSEL_DBG_HFCLK 0x00000001UL
863 #define CMU_DBGCLKSEL_DBG_DEFAULT (_CMU_DBGCLKSEL_DBG_DEFAULT << 0)
864 #define CMU_DBGCLKSEL_DBG_AUXHFRCO (_CMU_DBGCLKSEL_DBG_AUXHFRCO << 0)
865 #define CMU_DBGCLKSEL_DBG_HFCLK (_CMU_DBGCLKSEL_DBG_HFCLK << 0)
868 #define _CMU_HFCLKSEL_RESETVALUE 0x00000000UL
869 #define _CMU_HFCLKSEL_MASK 0x00000007UL
870 #define _CMU_HFCLKSEL_HF_SHIFT 0
871 #define _CMU_HFCLKSEL_HF_MASK 0x7UL
872 #define _CMU_HFCLKSEL_HF_DEFAULT 0x00000000UL
873 #define _CMU_HFCLKSEL_HF_HFRCO 0x00000001UL
874 #define _CMU_HFCLKSEL_HF_HFXO 0x00000002UL
875 #define _CMU_HFCLKSEL_HF_LFRCO 0x00000003UL
876 #define _CMU_HFCLKSEL_HF_LFXO 0x00000004UL
877 #define CMU_HFCLKSEL_HF_DEFAULT (_CMU_HFCLKSEL_HF_DEFAULT << 0)
878 #define CMU_HFCLKSEL_HF_HFRCO (_CMU_HFCLKSEL_HF_HFRCO << 0)
879 #define CMU_HFCLKSEL_HF_HFXO (_CMU_HFCLKSEL_HF_HFXO << 0)
880 #define CMU_HFCLKSEL_HF_LFRCO (_CMU_HFCLKSEL_HF_LFRCO << 0)
881 #define CMU_HFCLKSEL_HF_LFXO (_CMU_HFCLKSEL_HF_LFXO << 0)
884 #define _CMU_LFACLKSEL_RESETVALUE 0x00000000UL
885 #define _CMU_LFACLKSEL_MASK 0x00000007UL
886 #define _CMU_LFACLKSEL_LFA_SHIFT 0
887 #define _CMU_LFACLKSEL_LFA_MASK 0x7UL
888 #define _CMU_LFACLKSEL_LFA_DEFAULT 0x00000000UL
889 #define _CMU_LFACLKSEL_LFA_DISABLED 0x00000000UL
890 #define _CMU_LFACLKSEL_LFA_LFRCO 0x00000001UL
891 #define _CMU_LFACLKSEL_LFA_LFXO 0x00000002UL
892 #define _CMU_LFACLKSEL_LFA_ULFRCO 0x00000004UL
893 #define CMU_LFACLKSEL_LFA_DEFAULT (_CMU_LFACLKSEL_LFA_DEFAULT << 0)
894 #define CMU_LFACLKSEL_LFA_DISABLED (_CMU_LFACLKSEL_LFA_DISABLED << 0)
895 #define CMU_LFACLKSEL_LFA_LFRCO (_CMU_LFACLKSEL_LFA_LFRCO << 0)
896 #define CMU_LFACLKSEL_LFA_LFXO (_CMU_LFACLKSEL_LFA_LFXO << 0)
897 #define CMU_LFACLKSEL_LFA_ULFRCO (_CMU_LFACLKSEL_LFA_ULFRCO << 0)
900 #define _CMU_LFBCLKSEL_RESETVALUE 0x00000000UL
901 #define _CMU_LFBCLKSEL_MASK 0x00000007UL
902 #define _CMU_LFBCLKSEL_LFB_SHIFT 0
903 #define _CMU_LFBCLKSEL_LFB_MASK 0x7UL
904 #define _CMU_LFBCLKSEL_LFB_DEFAULT 0x00000000UL
905 #define _CMU_LFBCLKSEL_LFB_DISABLED 0x00000000UL
906 #define _CMU_LFBCLKSEL_LFB_LFRCO 0x00000001UL
907 #define _CMU_LFBCLKSEL_LFB_LFXO 0x00000002UL
908 #define _CMU_LFBCLKSEL_LFB_HFCLKLE 0x00000003UL
909 #define _CMU_LFBCLKSEL_LFB_ULFRCO 0x00000004UL
910 #define CMU_LFBCLKSEL_LFB_DEFAULT (_CMU_LFBCLKSEL_LFB_DEFAULT << 0)
911 #define CMU_LFBCLKSEL_LFB_DISABLED (_CMU_LFBCLKSEL_LFB_DISABLED << 0)
912 #define CMU_LFBCLKSEL_LFB_LFRCO (_CMU_LFBCLKSEL_LFB_LFRCO << 0)
913 #define CMU_LFBCLKSEL_LFB_LFXO (_CMU_LFBCLKSEL_LFB_LFXO << 0)
914 #define CMU_LFBCLKSEL_LFB_HFCLKLE (_CMU_LFBCLKSEL_LFB_HFCLKLE << 0)
915 #define CMU_LFBCLKSEL_LFB_ULFRCO (_CMU_LFBCLKSEL_LFB_ULFRCO << 0)
918 #define _CMU_LFECLKSEL_RESETVALUE 0x00000000UL
919 #define _CMU_LFECLKSEL_MASK 0x00000007UL
920 #define _CMU_LFECLKSEL_LFE_SHIFT 0
921 #define _CMU_LFECLKSEL_LFE_MASK 0x7UL
922 #define _CMU_LFECLKSEL_LFE_DEFAULT 0x00000000UL
923 #define _CMU_LFECLKSEL_LFE_DISABLED 0x00000000UL
924 #define _CMU_LFECLKSEL_LFE_LFRCO 0x00000001UL
925 #define _CMU_LFECLKSEL_LFE_LFXO 0x00000002UL
926 #define _CMU_LFECLKSEL_LFE_ULFRCO 0x00000004UL
927 #define CMU_LFECLKSEL_LFE_DEFAULT (_CMU_LFECLKSEL_LFE_DEFAULT << 0)
928 #define CMU_LFECLKSEL_LFE_DISABLED (_CMU_LFECLKSEL_LFE_DISABLED << 0)
929 #define CMU_LFECLKSEL_LFE_LFRCO (_CMU_LFECLKSEL_LFE_LFRCO << 0)
930 #define CMU_LFECLKSEL_LFE_LFXO (_CMU_LFECLKSEL_LFE_LFXO << 0)
931 #define CMU_LFECLKSEL_LFE_ULFRCO (_CMU_LFECLKSEL_LFE_ULFRCO << 0)
934 #define _CMU_STATUS_RESETVALUE 0x00010003UL
935 #define _CMU_STATUS_MASK 0x07D103FFUL
936 #define CMU_STATUS_HFRCOENS (0x1UL << 0)
937 #define _CMU_STATUS_HFRCOENS_SHIFT 0
938 #define _CMU_STATUS_HFRCOENS_MASK 0x1UL
939 #define _CMU_STATUS_HFRCOENS_DEFAULT 0x00000001UL
940 #define CMU_STATUS_HFRCOENS_DEFAULT (_CMU_STATUS_HFRCOENS_DEFAULT << 0)
941 #define CMU_STATUS_HFRCORDY (0x1UL << 1)
942 #define _CMU_STATUS_HFRCORDY_SHIFT 1
943 #define _CMU_STATUS_HFRCORDY_MASK 0x2UL
944 #define _CMU_STATUS_HFRCORDY_DEFAULT 0x00000001UL
945 #define CMU_STATUS_HFRCORDY_DEFAULT (_CMU_STATUS_HFRCORDY_DEFAULT << 1)
946 #define CMU_STATUS_HFXOENS (0x1UL << 2)
947 #define _CMU_STATUS_HFXOENS_SHIFT 2
948 #define _CMU_STATUS_HFXOENS_MASK 0x4UL
949 #define _CMU_STATUS_HFXOENS_DEFAULT 0x00000000UL
950 #define CMU_STATUS_HFXOENS_DEFAULT (_CMU_STATUS_HFXOENS_DEFAULT << 2)
951 #define CMU_STATUS_HFXORDY (0x1UL << 3)
952 #define _CMU_STATUS_HFXORDY_SHIFT 3
953 #define _CMU_STATUS_HFXORDY_MASK 0x8UL
954 #define _CMU_STATUS_HFXORDY_DEFAULT 0x00000000UL
955 #define CMU_STATUS_HFXORDY_DEFAULT (_CMU_STATUS_HFXORDY_DEFAULT << 3)
956 #define CMU_STATUS_AUXHFRCOENS (0x1UL << 4)
957 #define _CMU_STATUS_AUXHFRCOENS_SHIFT 4
958 #define _CMU_STATUS_AUXHFRCOENS_MASK 0x10UL
959 #define _CMU_STATUS_AUXHFRCOENS_DEFAULT 0x00000000UL
960 #define CMU_STATUS_AUXHFRCOENS_DEFAULT (_CMU_STATUS_AUXHFRCOENS_DEFAULT << 4)
961 #define CMU_STATUS_AUXHFRCORDY (0x1UL << 5)
962 #define _CMU_STATUS_AUXHFRCORDY_SHIFT 5
963 #define _CMU_STATUS_AUXHFRCORDY_MASK 0x20UL
964 #define _CMU_STATUS_AUXHFRCORDY_DEFAULT 0x00000000UL
965 #define CMU_STATUS_AUXHFRCORDY_DEFAULT (_CMU_STATUS_AUXHFRCORDY_DEFAULT << 5)
966 #define CMU_STATUS_LFRCOENS (0x1UL << 6)
967 #define _CMU_STATUS_LFRCOENS_SHIFT 6
968 #define _CMU_STATUS_LFRCOENS_MASK 0x40UL
969 #define _CMU_STATUS_LFRCOENS_DEFAULT 0x00000000UL
970 #define CMU_STATUS_LFRCOENS_DEFAULT (_CMU_STATUS_LFRCOENS_DEFAULT << 6)
971 #define CMU_STATUS_LFRCORDY (0x1UL << 7)
972 #define _CMU_STATUS_LFRCORDY_SHIFT 7
973 #define _CMU_STATUS_LFRCORDY_MASK 0x80UL
974 #define _CMU_STATUS_LFRCORDY_DEFAULT 0x00000000UL
975 #define CMU_STATUS_LFRCORDY_DEFAULT (_CMU_STATUS_LFRCORDY_DEFAULT << 7)
976 #define CMU_STATUS_LFXOENS (0x1UL << 8)
977 #define _CMU_STATUS_LFXOENS_SHIFT 8
978 #define _CMU_STATUS_LFXOENS_MASK 0x100UL
979 #define _CMU_STATUS_LFXOENS_DEFAULT 0x00000000UL
980 #define CMU_STATUS_LFXOENS_DEFAULT (_CMU_STATUS_LFXOENS_DEFAULT << 8)
981 #define CMU_STATUS_LFXORDY (0x1UL << 9)
982 #define _CMU_STATUS_LFXORDY_SHIFT 9
983 #define _CMU_STATUS_LFXORDY_MASK 0x200UL
984 #define _CMU_STATUS_LFXORDY_DEFAULT 0x00000000UL
985 #define CMU_STATUS_LFXORDY_DEFAULT (_CMU_STATUS_LFXORDY_DEFAULT << 9)
986 #define CMU_STATUS_CALRDY (0x1UL << 16)
987 #define _CMU_STATUS_CALRDY_SHIFT 16
988 #define _CMU_STATUS_CALRDY_MASK 0x10000UL
989 #define _CMU_STATUS_CALRDY_DEFAULT 0x00000001UL
990 #define CMU_STATUS_CALRDY_DEFAULT (_CMU_STATUS_CALRDY_DEFAULT << 16)
991 #define CMU_STATUS_HFXOWARMS (0x1UL << 20)
992 #define _CMU_STATUS_HFXOWARMS_SHIFT 20
993 #define _CMU_STATUS_HFXOWARMS_MASK 0x100000UL
994 #define _CMU_STATUS_HFXOWARMS_DEFAULT 0x00000000UL
995 #define CMU_STATUS_HFXOWARMS_DEFAULT (_CMU_STATUS_HFXOWARMS_DEFAULT << 20)
996 #define CMU_STATUS_HFXOPEAKDETRDY (0x1UL << 22)
997 #define _CMU_STATUS_HFXOPEAKDETRDY_SHIFT 22
998 #define _CMU_STATUS_HFXOPEAKDETRDY_MASK 0x400000UL
999 #define _CMU_STATUS_HFXOPEAKDETRDY_DEFAULT 0x00000000UL
1000 #define CMU_STATUS_HFXOPEAKDETRDY_DEFAULT (_CMU_STATUS_HFXOPEAKDETRDY_DEFAULT << 22)
1001 #define CMU_STATUS_HFXOSHUNTOPTRDY (0x1UL << 23)
1002 #define _CMU_STATUS_HFXOSHUNTOPTRDY_SHIFT 23
1003 #define _CMU_STATUS_HFXOSHUNTOPTRDY_MASK 0x800000UL
1004 #define _CMU_STATUS_HFXOSHUNTOPTRDY_DEFAULT 0x00000000UL
1005 #define CMU_STATUS_HFXOSHUNTOPTRDY_DEFAULT (_CMU_STATUS_HFXOSHUNTOPTRDY_DEFAULT << 23)
1006 #define CMU_STATUS_HFXOAMPHIGH (0x1UL << 24)
1007 #define _CMU_STATUS_HFXOAMPHIGH_SHIFT 24
1008 #define _CMU_STATUS_HFXOAMPHIGH_MASK 0x1000000UL
1009 #define _CMU_STATUS_HFXOAMPHIGH_DEFAULT 0x00000000UL
1010 #define CMU_STATUS_HFXOAMPHIGH_DEFAULT (_CMU_STATUS_HFXOAMPHIGH_DEFAULT << 24)
1011 #define CMU_STATUS_HFXOAMPLOW (0x1UL << 25)
1012 #define _CMU_STATUS_HFXOAMPLOW_SHIFT 25
1013 #define _CMU_STATUS_HFXOAMPLOW_MASK 0x2000000UL
1014 #define _CMU_STATUS_HFXOAMPLOW_DEFAULT 0x00000000UL
1015 #define CMU_STATUS_HFXOAMPLOW_DEFAULT (_CMU_STATUS_HFXOAMPLOW_DEFAULT << 25)
1016 #define CMU_STATUS_HFXOREGILOW (0x1UL << 26)
1017 #define _CMU_STATUS_HFXOREGILOW_SHIFT 26
1018 #define _CMU_STATUS_HFXOREGILOW_MASK 0x4000000UL
1019 #define _CMU_STATUS_HFXOREGILOW_DEFAULT 0x00000000UL
1020 #define CMU_STATUS_HFXOREGILOW_DEFAULT (_CMU_STATUS_HFXOREGILOW_DEFAULT << 26)
1023 #define _CMU_HFCLKSTATUS_RESETVALUE 0x00000001UL
1024 #define _CMU_HFCLKSTATUS_MASK 0x00000007UL
1025 #define _CMU_HFCLKSTATUS_SELECTED_SHIFT 0
1026 #define _CMU_HFCLKSTATUS_SELECTED_MASK 0x7UL
1027 #define _CMU_HFCLKSTATUS_SELECTED_DEFAULT 0x00000001UL
1028 #define _CMU_HFCLKSTATUS_SELECTED_HFRCO 0x00000001UL
1029 #define _CMU_HFCLKSTATUS_SELECTED_HFXO 0x00000002UL
1030 #define _CMU_HFCLKSTATUS_SELECTED_LFRCO 0x00000003UL
1031 #define _CMU_HFCLKSTATUS_SELECTED_LFXO 0x00000004UL
1032 #define CMU_HFCLKSTATUS_SELECTED_DEFAULT (_CMU_HFCLKSTATUS_SELECTED_DEFAULT << 0)
1033 #define CMU_HFCLKSTATUS_SELECTED_HFRCO (_CMU_HFCLKSTATUS_SELECTED_HFRCO << 0)
1034 #define CMU_HFCLKSTATUS_SELECTED_HFXO (_CMU_HFCLKSTATUS_SELECTED_HFXO << 0)
1035 #define CMU_HFCLKSTATUS_SELECTED_LFRCO (_CMU_HFCLKSTATUS_SELECTED_LFRCO << 0)
1036 #define CMU_HFCLKSTATUS_SELECTED_LFXO (_CMU_HFCLKSTATUS_SELECTED_LFXO << 0)
1039 #define _CMU_HFXOTRIMSTATUS_RESETVALUE 0x00000500UL
1040 #define _CMU_HFXOTRIMSTATUS_MASK 0x000007FFUL
1041 #define _CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_SHIFT 0
1042 #define _CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_MASK 0x7FUL
1043 #define _CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_DEFAULT 0x00000000UL
1044 #define CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_DEFAULT (_CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_DEFAULT << 0)
1045 #define _CMU_HFXOTRIMSTATUS_REGISH_SHIFT 7
1046 #define _CMU_HFXOTRIMSTATUS_REGISH_MASK 0x780UL
1047 #define _CMU_HFXOTRIMSTATUS_REGISH_DEFAULT 0x0000000AUL
1048 #define CMU_HFXOTRIMSTATUS_REGISH_DEFAULT (_CMU_HFXOTRIMSTATUS_REGISH_DEFAULT << 7)
1051 #define _CMU_IF_RESETVALUE 0x00000001UL
1052 #define _CMU_IF_MASK 0x80007F7FUL
1053 #define CMU_IF_HFRCORDY (0x1UL << 0)
1054 #define _CMU_IF_HFRCORDY_SHIFT 0
1055 #define _CMU_IF_HFRCORDY_MASK 0x1UL
1056 #define _CMU_IF_HFRCORDY_DEFAULT 0x00000001UL
1057 #define CMU_IF_HFRCORDY_DEFAULT (_CMU_IF_HFRCORDY_DEFAULT << 0)
1058 #define CMU_IF_HFXORDY (0x1UL << 1)
1059 #define _CMU_IF_HFXORDY_SHIFT 1
1060 #define _CMU_IF_HFXORDY_MASK 0x2UL
1061 #define _CMU_IF_HFXORDY_DEFAULT 0x00000000UL
1062 #define CMU_IF_HFXORDY_DEFAULT (_CMU_IF_HFXORDY_DEFAULT << 1)
1063 #define CMU_IF_LFRCORDY (0x1UL << 2)
1064 #define _CMU_IF_LFRCORDY_SHIFT 2
1065 #define _CMU_IF_LFRCORDY_MASK 0x4UL
1066 #define _CMU_IF_LFRCORDY_DEFAULT 0x00000000UL
1067 #define CMU_IF_LFRCORDY_DEFAULT (_CMU_IF_LFRCORDY_DEFAULT << 2)
1068 #define CMU_IF_LFXORDY (0x1UL << 3)
1069 #define _CMU_IF_LFXORDY_SHIFT 3
1070 #define _CMU_IF_LFXORDY_MASK 0x8UL
1071 #define _CMU_IF_LFXORDY_DEFAULT 0x00000000UL
1072 #define CMU_IF_LFXORDY_DEFAULT (_CMU_IF_LFXORDY_DEFAULT << 3)
1073 #define CMU_IF_AUXHFRCORDY (0x1UL << 4)
1074 #define _CMU_IF_AUXHFRCORDY_SHIFT 4
1075 #define _CMU_IF_AUXHFRCORDY_MASK 0x10UL
1076 #define _CMU_IF_AUXHFRCORDY_DEFAULT 0x00000000UL
1077 #define CMU_IF_AUXHFRCORDY_DEFAULT (_CMU_IF_AUXHFRCORDY_DEFAULT << 4)
1078 #define CMU_IF_CALRDY (0x1UL << 5)
1079 #define _CMU_IF_CALRDY_SHIFT 5
1080 #define _CMU_IF_CALRDY_MASK 0x20UL
1081 #define _CMU_IF_CALRDY_DEFAULT 0x00000000UL
1082 #define CMU_IF_CALRDY_DEFAULT (_CMU_IF_CALRDY_DEFAULT << 5)
1083 #define CMU_IF_CALOF (0x1UL << 6)
1084 #define _CMU_IF_CALOF_SHIFT 6
1085 #define _CMU_IF_CALOF_MASK 0x40UL
1086 #define _CMU_IF_CALOF_DEFAULT 0x00000000UL
1087 #define CMU_IF_CALOF_DEFAULT (_CMU_IF_CALOF_DEFAULT << 6)
1088 #define CMU_IF_HFXODISERR (0x1UL << 8)
1089 #define _CMU_IF_HFXODISERR_SHIFT 8
1090 #define _CMU_IF_HFXODISERR_MASK 0x100UL
1091 #define _CMU_IF_HFXODISERR_DEFAULT 0x00000000UL
1092 #define CMU_IF_HFXODISERR_DEFAULT (_CMU_IF_HFXODISERR_DEFAULT << 8)
1093 #define CMU_IF_HFXOAUTOSW (0x1UL << 9)
1094 #define _CMU_IF_HFXOAUTOSW_SHIFT 9
1095 #define _CMU_IF_HFXOAUTOSW_MASK 0x200UL
1096 #define _CMU_IF_HFXOAUTOSW_DEFAULT 0x00000000UL
1097 #define CMU_IF_HFXOAUTOSW_DEFAULT (_CMU_IF_HFXOAUTOSW_DEFAULT << 9)
1098 #define CMU_IF_HFXOPEAKDETERR (0x1UL << 10)
1099 #define _CMU_IF_HFXOPEAKDETERR_SHIFT 10
1100 #define _CMU_IF_HFXOPEAKDETERR_MASK 0x400UL
1101 #define _CMU_IF_HFXOPEAKDETERR_DEFAULT 0x00000000UL
1102 #define CMU_IF_HFXOPEAKDETERR_DEFAULT (_CMU_IF_HFXOPEAKDETERR_DEFAULT << 10)
1103 #define CMU_IF_HFXOPEAKDETRDY (0x1UL << 11)
1104 #define _CMU_IF_HFXOPEAKDETRDY_SHIFT 11
1105 #define _CMU_IF_HFXOPEAKDETRDY_MASK 0x800UL
1106 #define _CMU_IF_HFXOPEAKDETRDY_DEFAULT 0x00000000UL
1107 #define CMU_IF_HFXOPEAKDETRDY_DEFAULT (_CMU_IF_HFXOPEAKDETRDY_DEFAULT << 11)
1108 #define CMU_IF_HFXOSHUNTOPTRDY (0x1UL << 12)
1109 #define _CMU_IF_HFXOSHUNTOPTRDY_SHIFT 12
1110 #define _CMU_IF_HFXOSHUNTOPTRDY_MASK 0x1000UL
1111 #define _CMU_IF_HFXOSHUNTOPTRDY_DEFAULT 0x00000000UL
1112 #define CMU_IF_HFXOSHUNTOPTRDY_DEFAULT (_CMU_IF_HFXOSHUNTOPTRDY_DEFAULT << 12)
1113 #define CMU_IF_HFRCODIS (0x1UL << 13)
1114 #define _CMU_IF_HFRCODIS_SHIFT 13
1115 #define _CMU_IF_HFRCODIS_MASK 0x2000UL
1116 #define _CMU_IF_HFRCODIS_DEFAULT 0x00000000UL
1117 #define CMU_IF_HFRCODIS_DEFAULT (_CMU_IF_HFRCODIS_DEFAULT << 13)
1118 #define CMU_IF_LFTIMEOUTERR (0x1UL << 14)
1119 #define _CMU_IF_LFTIMEOUTERR_SHIFT 14
1120 #define _CMU_IF_LFTIMEOUTERR_MASK 0x4000UL
1121 #define _CMU_IF_LFTIMEOUTERR_DEFAULT 0x00000000UL
1122 #define CMU_IF_LFTIMEOUTERR_DEFAULT (_CMU_IF_LFTIMEOUTERR_DEFAULT << 14)
1123 #define CMU_IF_CMUERR (0x1UL << 31)
1124 #define _CMU_IF_CMUERR_SHIFT 31
1125 #define _CMU_IF_CMUERR_MASK 0x80000000UL
1126 #define _CMU_IF_CMUERR_DEFAULT 0x00000000UL
1127 #define CMU_IF_CMUERR_DEFAULT (_CMU_IF_CMUERR_DEFAULT << 31)
1130 #define _CMU_IFS_RESETVALUE 0x00000000UL
1131 #define _CMU_IFS_MASK 0x80007F7FUL
1132 #define CMU_IFS_HFRCORDY (0x1UL << 0)
1133 #define _CMU_IFS_HFRCORDY_SHIFT 0
1134 #define _CMU_IFS_HFRCORDY_MASK 0x1UL
1135 #define _CMU_IFS_HFRCORDY_DEFAULT 0x00000000UL
1136 #define CMU_IFS_HFRCORDY_DEFAULT (_CMU_IFS_HFRCORDY_DEFAULT << 0)
1137 #define CMU_IFS_HFXORDY (0x1UL << 1)
1138 #define _CMU_IFS_HFXORDY_SHIFT 1
1139 #define _CMU_IFS_HFXORDY_MASK 0x2UL
1140 #define _CMU_IFS_HFXORDY_DEFAULT 0x00000000UL
1141 #define CMU_IFS_HFXORDY_DEFAULT (_CMU_IFS_HFXORDY_DEFAULT << 1)
1142 #define CMU_IFS_LFRCORDY (0x1UL << 2)
1143 #define _CMU_IFS_LFRCORDY_SHIFT 2
1144 #define _CMU_IFS_LFRCORDY_MASK 0x4UL
1145 #define _CMU_IFS_LFRCORDY_DEFAULT 0x00000000UL
1146 #define CMU_IFS_LFRCORDY_DEFAULT (_CMU_IFS_LFRCORDY_DEFAULT << 2)
1147 #define CMU_IFS_LFXORDY (0x1UL << 3)
1148 #define _CMU_IFS_LFXORDY_SHIFT 3
1149 #define _CMU_IFS_LFXORDY_MASK 0x8UL
1150 #define _CMU_IFS_LFXORDY_DEFAULT 0x00000000UL
1151 #define CMU_IFS_LFXORDY_DEFAULT (_CMU_IFS_LFXORDY_DEFAULT << 3)
1152 #define CMU_IFS_AUXHFRCORDY (0x1UL << 4)
1153 #define _CMU_IFS_AUXHFRCORDY_SHIFT 4
1154 #define _CMU_IFS_AUXHFRCORDY_MASK 0x10UL
1155 #define _CMU_IFS_AUXHFRCORDY_DEFAULT 0x00000000UL
1156 #define CMU_IFS_AUXHFRCORDY_DEFAULT (_CMU_IFS_AUXHFRCORDY_DEFAULT << 4)
1157 #define CMU_IFS_CALRDY (0x1UL << 5)
1158 #define _CMU_IFS_CALRDY_SHIFT 5
1159 #define _CMU_IFS_CALRDY_MASK 0x20UL
1160 #define _CMU_IFS_CALRDY_DEFAULT 0x00000000UL
1161 #define CMU_IFS_CALRDY_DEFAULT (_CMU_IFS_CALRDY_DEFAULT << 5)
1162 #define CMU_IFS_CALOF (0x1UL << 6)
1163 #define _CMU_IFS_CALOF_SHIFT 6
1164 #define _CMU_IFS_CALOF_MASK 0x40UL
1165 #define _CMU_IFS_CALOF_DEFAULT 0x00000000UL
1166 #define CMU_IFS_CALOF_DEFAULT (_CMU_IFS_CALOF_DEFAULT << 6)
1167 #define CMU_IFS_HFXODISERR (0x1UL << 8)
1168 #define _CMU_IFS_HFXODISERR_SHIFT 8
1169 #define _CMU_IFS_HFXODISERR_MASK 0x100UL
1170 #define _CMU_IFS_HFXODISERR_DEFAULT 0x00000000UL
1171 #define CMU_IFS_HFXODISERR_DEFAULT (_CMU_IFS_HFXODISERR_DEFAULT << 8)
1172 #define CMU_IFS_HFXOAUTOSW (0x1UL << 9)
1173 #define _CMU_IFS_HFXOAUTOSW_SHIFT 9
1174 #define _CMU_IFS_HFXOAUTOSW_MASK 0x200UL
1175 #define _CMU_IFS_HFXOAUTOSW_DEFAULT 0x00000000UL
1176 #define CMU_IFS_HFXOAUTOSW_DEFAULT (_CMU_IFS_HFXOAUTOSW_DEFAULT << 9)
1177 #define CMU_IFS_HFXOPEAKDETERR (0x1UL << 10)
1178 #define _CMU_IFS_HFXOPEAKDETERR_SHIFT 10
1179 #define _CMU_IFS_HFXOPEAKDETERR_MASK 0x400UL
1180 #define _CMU_IFS_HFXOPEAKDETERR_DEFAULT 0x00000000UL
1181 #define CMU_IFS_HFXOPEAKDETERR_DEFAULT (_CMU_IFS_HFXOPEAKDETERR_DEFAULT << 10)
1182 #define CMU_IFS_HFXOPEAKDETRDY (0x1UL << 11)
1183 #define _CMU_IFS_HFXOPEAKDETRDY_SHIFT 11
1184 #define _CMU_IFS_HFXOPEAKDETRDY_MASK 0x800UL
1185 #define _CMU_IFS_HFXOPEAKDETRDY_DEFAULT 0x00000000UL
1186 #define CMU_IFS_HFXOPEAKDETRDY_DEFAULT (_CMU_IFS_HFXOPEAKDETRDY_DEFAULT << 11)
1187 #define CMU_IFS_HFXOSHUNTOPTRDY (0x1UL << 12)
1188 #define _CMU_IFS_HFXOSHUNTOPTRDY_SHIFT 12
1189 #define _CMU_IFS_HFXOSHUNTOPTRDY_MASK 0x1000UL
1190 #define _CMU_IFS_HFXOSHUNTOPTRDY_DEFAULT 0x00000000UL
1191 #define CMU_IFS_HFXOSHUNTOPTRDY_DEFAULT (_CMU_IFS_HFXOSHUNTOPTRDY_DEFAULT << 12)
1192 #define CMU_IFS_HFRCODIS (0x1UL << 13)
1193 #define _CMU_IFS_HFRCODIS_SHIFT 13
1194 #define _CMU_IFS_HFRCODIS_MASK 0x2000UL
1195 #define _CMU_IFS_HFRCODIS_DEFAULT 0x00000000UL
1196 #define CMU_IFS_HFRCODIS_DEFAULT (_CMU_IFS_HFRCODIS_DEFAULT << 13)
1197 #define CMU_IFS_LFTIMEOUTERR (0x1UL << 14)
1198 #define _CMU_IFS_LFTIMEOUTERR_SHIFT 14
1199 #define _CMU_IFS_LFTIMEOUTERR_MASK 0x4000UL
1200 #define _CMU_IFS_LFTIMEOUTERR_DEFAULT 0x00000000UL
1201 #define CMU_IFS_LFTIMEOUTERR_DEFAULT (_CMU_IFS_LFTIMEOUTERR_DEFAULT << 14)
1202 #define CMU_IFS_CMUERR (0x1UL << 31)
1203 #define _CMU_IFS_CMUERR_SHIFT 31
1204 #define _CMU_IFS_CMUERR_MASK 0x80000000UL
1205 #define _CMU_IFS_CMUERR_DEFAULT 0x00000000UL
1206 #define CMU_IFS_CMUERR_DEFAULT (_CMU_IFS_CMUERR_DEFAULT << 31)
1209 #define _CMU_IFC_RESETVALUE 0x00000000UL
1210 #define _CMU_IFC_MASK 0x80007F7FUL
1211 #define CMU_IFC_HFRCORDY (0x1UL << 0)
1212 #define _CMU_IFC_HFRCORDY_SHIFT 0
1213 #define _CMU_IFC_HFRCORDY_MASK 0x1UL
1214 #define _CMU_IFC_HFRCORDY_DEFAULT 0x00000000UL
1215 #define CMU_IFC_HFRCORDY_DEFAULT (_CMU_IFC_HFRCORDY_DEFAULT << 0)
1216 #define CMU_IFC_HFXORDY (0x1UL << 1)
1217 #define _CMU_IFC_HFXORDY_SHIFT 1
1218 #define _CMU_IFC_HFXORDY_MASK 0x2UL
1219 #define _CMU_IFC_HFXORDY_DEFAULT 0x00000000UL
1220 #define CMU_IFC_HFXORDY_DEFAULT (_CMU_IFC_HFXORDY_DEFAULT << 1)
1221 #define CMU_IFC_LFRCORDY (0x1UL << 2)
1222 #define _CMU_IFC_LFRCORDY_SHIFT 2
1223 #define _CMU_IFC_LFRCORDY_MASK 0x4UL
1224 #define _CMU_IFC_LFRCORDY_DEFAULT 0x00000000UL
1225 #define CMU_IFC_LFRCORDY_DEFAULT (_CMU_IFC_LFRCORDY_DEFAULT << 2)
1226 #define CMU_IFC_LFXORDY (0x1UL << 3)
1227 #define _CMU_IFC_LFXORDY_SHIFT 3
1228 #define _CMU_IFC_LFXORDY_MASK 0x8UL
1229 #define _CMU_IFC_LFXORDY_DEFAULT 0x00000000UL
1230 #define CMU_IFC_LFXORDY_DEFAULT (_CMU_IFC_LFXORDY_DEFAULT << 3)
1231 #define CMU_IFC_AUXHFRCORDY (0x1UL << 4)
1232 #define _CMU_IFC_AUXHFRCORDY_SHIFT 4
1233 #define _CMU_IFC_AUXHFRCORDY_MASK 0x10UL
1234 #define _CMU_IFC_AUXHFRCORDY_DEFAULT 0x00000000UL
1235 #define CMU_IFC_AUXHFRCORDY_DEFAULT (_CMU_IFC_AUXHFRCORDY_DEFAULT << 4)
1236 #define CMU_IFC_CALRDY (0x1UL << 5)
1237 #define _CMU_IFC_CALRDY_SHIFT 5
1238 #define _CMU_IFC_CALRDY_MASK 0x20UL
1239 #define _CMU_IFC_CALRDY_DEFAULT 0x00000000UL
1240 #define CMU_IFC_CALRDY_DEFAULT (_CMU_IFC_CALRDY_DEFAULT << 5)
1241 #define CMU_IFC_CALOF (0x1UL << 6)
1242 #define _CMU_IFC_CALOF_SHIFT 6
1243 #define _CMU_IFC_CALOF_MASK 0x40UL
1244 #define _CMU_IFC_CALOF_DEFAULT 0x00000000UL
1245 #define CMU_IFC_CALOF_DEFAULT (_CMU_IFC_CALOF_DEFAULT << 6)
1246 #define CMU_IFC_HFXODISERR (0x1UL << 8)
1247 #define _CMU_IFC_HFXODISERR_SHIFT 8
1248 #define _CMU_IFC_HFXODISERR_MASK 0x100UL
1249 #define _CMU_IFC_HFXODISERR_DEFAULT 0x00000000UL
1250 #define CMU_IFC_HFXODISERR_DEFAULT (_CMU_IFC_HFXODISERR_DEFAULT << 8)
1251 #define CMU_IFC_HFXOAUTOSW (0x1UL << 9)
1252 #define _CMU_IFC_HFXOAUTOSW_SHIFT 9
1253 #define _CMU_IFC_HFXOAUTOSW_MASK 0x200UL
1254 #define _CMU_IFC_HFXOAUTOSW_DEFAULT 0x00000000UL
1255 #define CMU_IFC_HFXOAUTOSW_DEFAULT (_CMU_IFC_HFXOAUTOSW_DEFAULT << 9)
1256 #define CMU_IFC_HFXOPEAKDETERR (0x1UL << 10)
1257 #define _CMU_IFC_HFXOPEAKDETERR_SHIFT 10
1258 #define _CMU_IFC_HFXOPEAKDETERR_MASK 0x400UL
1259 #define _CMU_IFC_HFXOPEAKDETERR_DEFAULT 0x00000000UL
1260 #define CMU_IFC_HFXOPEAKDETERR_DEFAULT (_CMU_IFC_HFXOPEAKDETERR_DEFAULT << 10)
1261 #define CMU_IFC_HFXOPEAKDETRDY (0x1UL << 11)
1262 #define _CMU_IFC_HFXOPEAKDETRDY_SHIFT 11
1263 #define _CMU_IFC_HFXOPEAKDETRDY_MASK 0x800UL
1264 #define _CMU_IFC_HFXOPEAKDETRDY_DEFAULT 0x00000000UL
1265 #define CMU_IFC_HFXOPEAKDETRDY_DEFAULT (_CMU_IFC_HFXOPEAKDETRDY_DEFAULT << 11)
1266 #define CMU_IFC_HFXOSHUNTOPTRDY (0x1UL << 12)
1267 #define _CMU_IFC_HFXOSHUNTOPTRDY_SHIFT 12
1268 #define _CMU_IFC_HFXOSHUNTOPTRDY_MASK 0x1000UL
1269 #define _CMU_IFC_HFXOSHUNTOPTRDY_DEFAULT 0x00000000UL
1270 #define CMU_IFC_HFXOSHUNTOPTRDY_DEFAULT (_CMU_IFC_HFXOSHUNTOPTRDY_DEFAULT << 12)
1271 #define CMU_IFC_HFRCODIS (0x1UL << 13)
1272 #define _CMU_IFC_HFRCODIS_SHIFT 13
1273 #define _CMU_IFC_HFRCODIS_MASK 0x2000UL
1274 #define _CMU_IFC_HFRCODIS_DEFAULT 0x00000000UL
1275 #define CMU_IFC_HFRCODIS_DEFAULT (_CMU_IFC_HFRCODIS_DEFAULT << 13)
1276 #define CMU_IFC_LFTIMEOUTERR (0x1UL << 14)
1277 #define _CMU_IFC_LFTIMEOUTERR_SHIFT 14
1278 #define _CMU_IFC_LFTIMEOUTERR_MASK 0x4000UL
1279 #define _CMU_IFC_LFTIMEOUTERR_DEFAULT 0x00000000UL
1280 #define CMU_IFC_LFTIMEOUTERR_DEFAULT (_CMU_IFC_LFTIMEOUTERR_DEFAULT << 14)
1281 #define CMU_IFC_CMUERR (0x1UL << 31)
1282 #define _CMU_IFC_CMUERR_SHIFT 31
1283 #define _CMU_IFC_CMUERR_MASK 0x80000000UL
1284 #define _CMU_IFC_CMUERR_DEFAULT 0x00000000UL
1285 #define CMU_IFC_CMUERR_DEFAULT (_CMU_IFC_CMUERR_DEFAULT << 31)
1288 #define _CMU_IEN_RESETVALUE 0x00000000UL
1289 #define _CMU_IEN_MASK 0x80007F7FUL
1290 #define CMU_IEN_HFRCORDY (0x1UL << 0)
1291 #define _CMU_IEN_HFRCORDY_SHIFT 0
1292 #define _CMU_IEN_HFRCORDY_MASK 0x1UL
1293 #define _CMU_IEN_HFRCORDY_DEFAULT 0x00000000UL
1294 #define CMU_IEN_HFRCORDY_DEFAULT (_CMU_IEN_HFRCORDY_DEFAULT << 0)
1295 #define CMU_IEN_HFXORDY (0x1UL << 1)
1296 #define _CMU_IEN_HFXORDY_SHIFT 1
1297 #define _CMU_IEN_HFXORDY_MASK 0x2UL
1298 #define _CMU_IEN_HFXORDY_DEFAULT 0x00000000UL
1299 #define CMU_IEN_HFXORDY_DEFAULT (_CMU_IEN_HFXORDY_DEFAULT << 1)
1300 #define CMU_IEN_LFRCORDY (0x1UL << 2)
1301 #define _CMU_IEN_LFRCORDY_SHIFT 2
1302 #define _CMU_IEN_LFRCORDY_MASK 0x4UL
1303 #define _CMU_IEN_LFRCORDY_DEFAULT 0x00000000UL
1304 #define CMU_IEN_LFRCORDY_DEFAULT (_CMU_IEN_LFRCORDY_DEFAULT << 2)
1305 #define CMU_IEN_LFXORDY (0x1UL << 3)
1306 #define _CMU_IEN_LFXORDY_SHIFT 3
1307 #define _CMU_IEN_LFXORDY_MASK 0x8UL
1308 #define _CMU_IEN_LFXORDY_DEFAULT 0x00000000UL
1309 #define CMU_IEN_LFXORDY_DEFAULT (_CMU_IEN_LFXORDY_DEFAULT << 3)
1310 #define CMU_IEN_AUXHFRCORDY (0x1UL << 4)
1311 #define _CMU_IEN_AUXHFRCORDY_SHIFT 4
1312 #define _CMU_IEN_AUXHFRCORDY_MASK 0x10UL
1313 #define _CMU_IEN_AUXHFRCORDY_DEFAULT 0x00000000UL
1314 #define CMU_IEN_AUXHFRCORDY_DEFAULT (_CMU_IEN_AUXHFRCORDY_DEFAULT << 4)
1315 #define CMU_IEN_CALRDY (0x1UL << 5)
1316 #define _CMU_IEN_CALRDY_SHIFT 5
1317 #define _CMU_IEN_CALRDY_MASK 0x20UL
1318 #define _CMU_IEN_CALRDY_DEFAULT 0x00000000UL
1319 #define CMU_IEN_CALRDY_DEFAULT (_CMU_IEN_CALRDY_DEFAULT << 5)
1320 #define CMU_IEN_CALOF (0x1UL << 6)
1321 #define _CMU_IEN_CALOF_SHIFT 6
1322 #define _CMU_IEN_CALOF_MASK 0x40UL
1323 #define _CMU_IEN_CALOF_DEFAULT 0x00000000UL
1324 #define CMU_IEN_CALOF_DEFAULT (_CMU_IEN_CALOF_DEFAULT << 6)
1325 #define CMU_IEN_HFXODISERR (0x1UL << 8)
1326 #define _CMU_IEN_HFXODISERR_SHIFT 8
1327 #define _CMU_IEN_HFXODISERR_MASK 0x100UL
1328 #define _CMU_IEN_HFXODISERR_DEFAULT 0x00000000UL
1329 #define CMU_IEN_HFXODISERR_DEFAULT (_CMU_IEN_HFXODISERR_DEFAULT << 8)
1330 #define CMU_IEN_HFXOAUTOSW (0x1UL << 9)
1331 #define _CMU_IEN_HFXOAUTOSW_SHIFT 9
1332 #define _CMU_IEN_HFXOAUTOSW_MASK 0x200UL
1333 #define _CMU_IEN_HFXOAUTOSW_DEFAULT 0x00000000UL
1334 #define CMU_IEN_HFXOAUTOSW_DEFAULT (_CMU_IEN_HFXOAUTOSW_DEFAULT << 9)
1335 #define CMU_IEN_HFXOPEAKDETERR (0x1UL << 10)
1336 #define _CMU_IEN_HFXOPEAKDETERR_SHIFT 10
1337 #define _CMU_IEN_HFXOPEAKDETERR_MASK 0x400UL
1338 #define _CMU_IEN_HFXOPEAKDETERR_DEFAULT 0x00000000UL
1339 #define CMU_IEN_HFXOPEAKDETERR_DEFAULT (_CMU_IEN_HFXOPEAKDETERR_DEFAULT << 10)
1340 #define CMU_IEN_HFXOPEAKDETRDY (0x1UL << 11)
1341 #define _CMU_IEN_HFXOPEAKDETRDY_SHIFT 11
1342 #define _CMU_IEN_HFXOPEAKDETRDY_MASK 0x800UL
1343 #define _CMU_IEN_HFXOPEAKDETRDY_DEFAULT 0x00000000UL
1344 #define CMU_IEN_HFXOPEAKDETRDY_DEFAULT (_CMU_IEN_HFXOPEAKDETRDY_DEFAULT << 11)
1345 #define CMU_IEN_HFXOSHUNTOPTRDY (0x1UL << 12)
1346 #define _CMU_IEN_HFXOSHUNTOPTRDY_SHIFT 12
1347 #define _CMU_IEN_HFXOSHUNTOPTRDY_MASK 0x1000UL
1348 #define _CMU_IEN_HFXOSHUNTOPTRDY_DEFAULT 0x00000000UL
1349 #define CMU_IEN_HFXOSHUNTOPTRDY_DEFAULT (_CMU_IEN_HFXOSHUNTOPTRDY_DEFAULT << 12)
1350 #define CMU_IEN_HFRCODIS (0x1UL << 13)
1351 #define _CMU_IEN_HFRCODIS_SHIFT 13
1352 #define _CMU_IEN_HFRCODIS_MASK 0x2000UL
1353 #define _CMU_IEN_HFRCODIS_DEFAULT 0x00000000UL
1354 #define CMU_IEN_HFRCODIS_DEFAULT (_CMU_IEN_HFRCODIS_DEFAULT << 13)
1355 #define CMU_IEN_LFTIMEOUTERR (0x1UL << 14)
1356 #define _CMU_IEN_LFTIMEOUTERR_SHIFT 14
1357 #define _CMU_IEN_LFTIMEOUTERR_MASK 0x4000UL
1358 #define _CMU_IEN_LFTIMEOUTERR_DEFAULT 0x00000000UL
1359 #define CMU_IEN_LFTIMEOUTERR_DEFAULT (_CMU_IEN_LFTIMEOUTERR_DEFAULT << 14)
1360 #define CMU_IEN_CMUERR (0x1UL << 31)
1361 #define _CMU_IEN_CMUERR_SHIFT 31
1362 #define _CMU_IEN_CMUERR_MASK 0x80000000UL
1363 #define _CMU_IEN_CMUERR_DEFAULT 0x00000000UL
1364 #define CMU_IEN_CMUERR_DEFAULT (_CMU_IEN_CMUERR_DEFAULT << 31)
1367 #define _CMU_HFBUSCLKEN0_RESETVALUE 0x00000000UL
1368 #define _CMU_HFBUSCLKEN0_MASK 0x0000003FUL
1369 #define CMU_HFBUSCLKEN0_LE (0x1UL << 0)
1370 #define _CMU_HFBUSCLKEN0_LE_SHIFT 0
1371 #define _CMU_HFBUSCLKEN0_LE_MASK 0x1UL
1372 #define _CMU_HFBUSCLKEN0_LE_DEFAULT 0x00000000UL
1373 #define CMU_HFBUSCLKEN0_LE_DEFAULT (_CMU_HFBUSCLKEN0_LE_DEFAULT << 0)
1374 #define CMU_HFBUSCLKEN0_CRYPTO (0x1UL << 1)
1375 #define _CMU_HFBUSCLKEN0_CRYPTO_SHIFT 1
1376 #define _CMU_HFBUSCLKEN0_CRYPTO_MASK 0x2UL
1377 #define _CMU_HFBUSCLKEN0_CRYPTO_DEFAULT 0x00000000UL
1378 #define CMU_HFBUSCLKEN0_CRYPTO_DEFAULT (_CMU_HFBUSCLKEN0_CRYPTO_DEFAULT << 1)
1379 #define CMU_HFBUSCLKEN0_GPIO (0x1UL << 2)
1380 #define _CMU_HFBUSCLKEN0_GPIO_SHIFT 2
1381 #define _CMU_HFBUSCLKEN0_GPIO_MASK 0x4UL
1382 #define _CMU_HFBUSCLKEN0_GPIO_DEFAULT 0x00000000UL
1383 #define CMU_HFBUSCLKEN0_GPIO_DEFAULT (_CMU_HFBUSCLKEN0_GPIO_DEFAULT << 2)
1384 #define CMU_HFBUSCLKEN0_PRS (0x1UL << 3)
1385 #define _CMU_HFBUSCLKEN0_PRS_SHIFT 3
1386 #define _CMU_HFBUSCLKEN0_PRS_MASK 0x8UL
1387 #define _CMU_HFBUSCLKEN0_PRS_DEFAULT 0x00000000UL
1388 #define CMU_HFBUSCLKEN0_PRS_DEFAULT (_CMU_HFBUSCLKEN0_PRS_DEFAULT << 3)
1389 #define CMU_HFBUSCLKEN0_LDMA (0x1UL << 4)
1390 #define _CMU_HFBUSCLKEN0_LDMA_SHIFT 4
1391 #define _CMU_HFBUSCLKEN0_LDMA_MASK 0x10UL
1392 #define _CMU_HFBUSCLKEN0_LDMA_DEFAULT 0x00000000UL
1393 #define CMU_HFBUSCLKEN0_LDMA_DEFAULT (_CMU_HFBUSCLKEN0_LDMA_DEFAULT << 4)
1394 #define CMU_HFBUSCLKEN0_GPCRC (0x1UL << 5)
1395 #define _CMU_HFBUSCLKEN0_GPCRC_SHIFT 5
1396 #define _CMU_HFBUSCLKEN0_GPCRC_MASK 0x20UL
1397 #define _CMU_HFBUSCLKEN0_GPCRC_DEFAULT 0x00000000UL
1398 #define CMU_HFBUSCLKEN0_GPCRC_DEFAULT (_CMU_HFBUSCLKEN0_GPCRC_DEFAULT << 5)
1401 #define _CMU_HFPERCLKEN0_RESETVALUE 0x00000000UL
1402 #define _CMU_HFPERCLKEN0_MASK 0x000003FFUL
1403 #define CMU_HFPERCLKEN0_TIMER0 (0x1UL << 0)
1404 #define _CMU_HFPERCLKEN0_TIMER0_SHIFT 0
1405 #define _CMU_HFPERCLKEN0_TIMER0_MASK 0x1UL
1406 #define _CMU_HFPERCLKEN0_TIMER0_DEFAULT 0x00000000UL
1407 #define CMU_HFPERCLKEN0_TIMER0_DEFAULT (_CMU_HFPERCLKEN0_TIMER0_DEFAULT << 0)
1408 #define CMU_HFPERCLKEN0_TIMER1 (0x1UL << 1)
1409 #define _CMU_HFPERCLKEN0_TIMER1_SHIFT 1
1410 #define _CMU_HFPERCLKEN0_TIMER1_MASK 0x2UL
1411 #define _CMU_HFPERCLKEN0_TIMER1_DEFAULT 0x00000000UL
1412 #define CMU_HFPERCLKEN0_TIMER1_DEFAULT (_CMU_HFPERCLKEN0_TIMER1_DEFAULT << 1)
1413 #define CMU_HFPERCLKEN0_USART0 (0x1UL << 2)
1414 #define _CMU_HFPERCLKEN0_USART0_SHIFT 2
1415 #define _CMU_HFPERCLKEN0_USART0_MASK 0x4UL
1416 #define _CMU_HFPERCLKEN0_USART0_DEFAULT 0x00000000UL
1417 #define CMU_HFPERCLKEN0_USART0_DEFAULT (_CMU_HFPERCLKEN0_USART0_DEFAULT << 2)
1418 #define CMU_HFPERCLKEN0_USART1 (0x1UL << 3)
1419 #define _CMU_HFPERCLKEN0_USART1_SHIFT 3
1420 #define _CMU_HFPERCLKEN0_USART1_MASK 0x8UL
1421 #define _CMU_HFPERCLKEN0_USART1_DEFAULT 0x00000000UL
1422 #define CMU_HFPERCLKEN0_USART1_DEFAULT (_CMU_HFPERCLKEN0_USART1_DEFAULT << 3)
1423 #define CMU_HFPERCLKEN0_ACMP0 (0x1UL << 4)
1424 #define _CMU_HFPERCLKEN0_ACMP0_SHIFT 4
1425 #define _CMU_HFPERCLKEN0_ACMP0_MASK 0x10UL
1426 #define _CMU_HFPERCLKEN0_ACMP0_DEFAULT 0x00000000UL
1427 #define CMU_HFPERCLKEN0_ACMP0_DEFAULT (_CMU_HFPERCLKEN0_ACMP0_DEFAULT << 4)
1428 #define CMU_HFPERCLKEN0_ACMP1 (0x1UL << 5)
1429 #define _CMU_HFPERCLKEN0_ACMP1_SHIFT 5
1430 #define _CMU_HFPERCLKEN0_ACMP1_MASK 0x20UL
1431 #define _CMU_HFPERCLKEN0_ACMP1_DEFAULT 0x00000000UL
1432 #define CMU_HFPERCLKEN0_ACMP1_DEFAULT (_CMU_HFPERCLKEN0_ACMP1_DEFAULT << 5)
1433 #define CMU_HFPERCLKEN0_CRYOTIMER (0x1UL << 6)
1434 #define _CMU_HFPERCLKEN0_CRYOTIMER_SHIFT 6
1435 #define _CMU_HFPERCLKEN0_CRYOTIMER_MASK 0x40UL
1436 #define _CMU_HFPERCLKEN0_CRYOTIMER_DEFAULT 0x00000000UL
1437 #define CMU_HFPERCLKEN0_CRYOTIMER_DEFAULT (_CMU_HFPERCLKEN0_CRYOTIMER_DEFAULT << 6)
1438 #define CMU_HFPERCLKEN0_I2C0 (0x1UL << 7)
1439 #define _CMU_HFPERCLKEN0_I2C0_SHIFT 7
1440 #define _CMU_HFPERCLKEN0_I2C0_MASK 0x80UL
1441 #define _CMU_HFPERCLKEN0_I2C0_DEFAULT 0x00000000UL
1442 #define CMU_HFPERCLKEN0_I2C0_DEFAULT (_CMU_HFPERCLKEN0_I2C0_DEFAULT << 7)
1443 #define CMU_HFPERCLKEN0_ADC0 (0x1UL << 8)
1444 #define _CMU_HFPERCLKEN0_ADC0_SHIFT 8
1445 #define _CMU_HFPERCLKEN0_ADC0_MASK 0x100UL
1446 #define _CMU_HFPERCLKEN0_ADC0_DEFAULT 0x00000000UL
1447 #define CMU_HFPERCLKEN0_ADC0_DEFAULT (_CMU_HFPERCLKEN0_ADC0_DEFAULT << 8)
1448 #define CMU_HFPERCLKEN0_IDAC0 (0x1UL << 9)
1449 #define _CMU_HFPERCLKEN0_IDAC0_SHIFT 9
1450 #define _CMU_HFPERCLKEN0_IDAC0_MASK 0x200UL
1451 #define _CMU_HFPERCLKEN0_IDAC0_DEFAULT 0x00000000UL
1452 #define CMU_HFPERCLKEN0_IDAC0_DEFAULT (_CMU_HFPERCLKEN0_IDAC0_DEFAULT << 9)
1455 #define _CMU_LFACLKEN0_RESETVALUE 0x00000000UL
1456 #define _CMU_LFACLKEN0_MASK 0x00000001UL
1457 #define CMU_LFACLKEN0_LETIMER0 (0x1UL << 0)
1458 #define _CMU_LFACLKEN0_LETIMER0_SHIFT 0
1459 #define _CMU_LFACLKEN0_LETIMER0_MASK 0x1UL
1460 #define _CMU_LFACLKEN0_LETIMER0_DEFAULT 0x00000000UL
1461 #define CMU_LFACLKEN0_LETIMER0_DEFAULT (_CMU_LFACLKEN0_LETIMER0_DEFAULT << 0)
1464 #define _CMU_LFBCLKEN0_RESETVALUE 0x00000000UL
1465 #define _CMU_LFBCLKEN0_MASK 0x00000001UL
1466 #define CMU_LFBCLKEN0_LEUART0 (0x1UL << 0)
1467 #define _CMU_LFBCLKEN0_LEUART0_SHIFT 0
1468 #define _CMU_LFBCLKEN0_LEUART0_MASK 0x1UL
1469 #define _CMU_LFBCLKEN0_LEUART0_DEFAULT 0x00000000UL
1470 #define CMU_LFBCLKEN0_LEUART0_DEFAULT (_CMU_LFBCLKEN0_LEUART0_DEFAULT << 0)
1473 #define _CMU_LFECLKEN0_RESETVALUE 0x00000000UL
1474 #define _CMU_LFECLKEN0_MASK 0x00000001UL
1475 #define CMU_LFECLKEN0_RTCC (0x1UL << 0)
1476 #define _CMU_LFECLKEN0_RTCC_SHIFT 0
1477 #define _CMU_LFECLKEN0_RTCC_MASK 0x1UL
1478 #define _CMU_LFECLKEN0_RTCC_DEFAULT 0x00000000UL
1479 #define CMU_LFECLKEN0_RTCC_DEFAULT (_CMU_LFECLKEN0_RTCC_DEFAULT << 0)
1482 #define _CMU_HFPRESC_RESETVALUE 0x00000000UL
1483 #define _CMU_HFPRESC_MASK 0x01001F00UL
1484 #define _CMU_HFPRESC_PRESC_SHIFT 8
1485 #define _CMU_HFPRESC_PRESC_MASK 0x1F00UL
1486 #define _CMU_HFPRESC_PRESC_DEFAULT 0x00000000UL
1487 #define _CMU_HFPRESC_PRESC_NODIVISION 0x00000000UL
1488 #define CMU_HFPRESC_PRESC_DEFAULT (_CMU_HFPRESC_PRESC_DEFAULT << 8)
1489 #define CMU_HFPRESC_PRESC_NODIVISION (_CMU_HFPRESC_PRESC_NODIVISION << 8)
1490 #define _CMU_HFPRESC_HFCLKLEPRESC_SHIFT 24
1491 #define _CMU_HFPRESC_HFCLKLEPRESC_MASK 0x1000000UL
1492 #define _CMU_HFPRESC_HFCLKLEPRESC_DEFAULT 0x00000000UL
1493 #define _CMU_HFPRESC_HFCLKLEPRESC_DIV2 0x00000000UL
1494 #define _CMU_HFPRESC_HFCLKLEPRESC_DIV4 0x00000001UL
1495 #define CMU_HFPRESC_HFCLKLEPRESC_DEFAULT (_CMU_HFPRESC_HFCLKLEPRESC_DEFAULT << 24)
1496 #define CMU_HFPRESC_HFCLKLEPRESC_DIV2 (_CMU_HFPRESC_HFCLKLEPRESC_DIV2 << 24)
1497 #define CMU_HFPRESC_HFCLKLEPRESC_DIV4 (_CMU_HFPRESC_HFCLKLEPRESC_DIV4 << 24)
1500 #define _CMU_HFCOREPRESC_RESETVALUE 0x00000000UL
1501 #define _CMU_HFCOREPRESC_MASK 0x0001FF00UL
1502 #define _CMU_HFCOREPRESC_PRESC_SHIFT 8
1503 #define _CMU_HFCOREPRESC_PRESC_MASK 0x1FF00UL
1504 #define _CMU_HFCOREPRESC_PRESC_DEFAULT 0x00000000UL
1505 #define _CMU_HFCOREPRESC_PRESC_NODIVISION 0x00000000UL
1506 #define CMU_HFCOREPRESC_PRESC_DEFAULT (_CMU_HFCOREPRESC_PRESC_DEFAULT << 8)
1507 #define CMU_HFCOREPRESC_PRESC_NODIVISION (_CMU_HFCOREPRESC_PRESC_NODIVISION << 8)
1510 #define _CMU_HFPERPRESC_RESETVALUE 0x00000000UL
1511 #define _CMU_HFPERPRESC_MASK 0x0001FF00UL
1512 #define _CMU_HFPERPRESC_PRESC_SHIFT 8
1513 #define _CMU_HFPERPRESC_PRESC_MASK 0x1FF00UL
1514 #define _CMU_HFPERPRESC_PRESC_DEFAULT 0x00000000UL
1515 #define _CMU_HFPERPRESC_PRESC_NODIVISION 0x00000000UL
1516 #define CMU_HFPERPRESC_PRESC_DEFAULT (_CMU_HFPERPRESC_PRESC_DEFAULT << 8)
1517 #define CMU_HFPERPRESC_PRESC_NODIVISION (_CMU_HFPERPRESC_PRESC_NODIVISION << 8)
1520 #define _CMU_HFEXPPRESC_RESETVALUE 0x00000000UL
1521 #define _CMU_HFEXPPRESC_MASK 0x00001F00UL
1522 #define _CMU_HFEXPPRESC_PRESC_SHIFT 8
1523 #define _CMU_HFEXPPRESC_PRESC_MASK 0x1F00UL
1524 #define _CMU_HFEXPPRESC_PRESC_DEFAULT 0x00000000UL
1525 #define _CMU_HFEXPPRESC_PRESC_NODIVISION 0x00000000UL
1526 #define CMU_HFEXPPRESC_PRESC_DEFAULT (_CMU_HFEXPPRESC_PRESC_DEFAULT << 8)
1527 #define CMU_HFEXPPRESC_PRESC_NODIVISION (_CMU_HFEXPPRESC_PRESC_NODIVISION << 8)
1530 #define _CMU_LFAPRESC0_RESETVALUE 0x00000000UL
1531 #define _CMU_LFAPRESC0_MASK 0x0000000FUL
1532 #define _CMU_LFAPRESC0_LETIMER0_SHIFT 0
1533 #define _CMU_LFAPRESC0_LETIMER0_MASK 0xFUL
1534 #define _CMU_LFAPRESC0_LETIMER0_DIV1 0x00000000UL
1535 #define _CMU_LFAPRESC0_LETIMER0_DIV2 0x00000001UL
1536 #define _CMU_LFAPRESC0_LETIMER0_DIV4 0x00000002UL
1537 #define _CMU_LFAPRESC0_LETIMER0_DIV8 0x00000003UL
1538 #define _CMU_LFAPRESC0_LETIMER0_DIV16 0x00000004UL
1539 #define _CMU_LFAPRESC0_LETIMER0_DIV32 0x00000005UL
1540 #define _CMU_LFAPRESC0_LETIMER0_DIV64 0x00000006UL
1541 #define _CMU_LFAPRESC0_LETIMER0_DIV128 0x00000007UL
1542 #define _CMU_LFAPRESC0_LETIMER0_DIV256 0x00000008UL
1543 #define _CMU_LFAPRESC0_LETIMER0_DIV512 0x00000009UL
1544 #define _CMU_LFAPRESC0_LETIMER0_DIV1024 0x0000000AUL
1545 #define _CMU_LFAPRESC0_LETIMER0_DIV2048 0x0000000BUL
1546 #define _CMU_LFAPRESC0_LETIMER0_DIV4096 0x0000000CUL
1547 #define _CMU_LFAPRESC0_LETIMER0_DIV8192 0x0000000DUL
1548 #define _CMU_LFAPRESC0_LETIMER0_DIV16384 0x0000000EUL
1549 #define _CMU_LFAPRESC0_LETIMER0_DIV32768 0x0000000FUL
1550 #define CMU_LFAPRESC0_LETIMER0_DIV1 (_CMU_LFAPRESC0_LETIMER0_DIV1 << 0)
1551 #define CMU_LFAPRESC0_LETIMER0_DIV2 (_CMU_LFAPRESC0_LETIMER0_DIV2 << 0)
1552 #define CMU_LFAPRESC0_LETIMER0_DIV4 (_CMU_LFAPRESC0_LETIMER0_DIV4 << 0)
1553 #define CMU_LFAPRESC0_LETIMER0_DIV8 (_CMU_LFAPRESC0_LETIMER0_DIV8 << 0)
1554 #define CMU_LFAPRESC0_LETIMER0_DIV16 (_CMU_LFAPRESC0_LETIMER0_DIV16 << 0)
1555 #define CMU_LFAPRESC0_LETIMER0_DIV32 (_CMU_LFAPRESC0_LETIMER0_DIV32 << 0)
1556 #define CMU_LFAPRESC0_LETIMER0_DIV64 (_CMU_LFAPRESC0_LETIMER0_DIV64 << 0)
1557 #define CMU_LFAPRESC0_LETIMER0_DIV128 (_CMU_LFAPRESC0_LETIMER0_DIV128 << 0)
1558 #define CMU_LFAPRESC0_LETIMER0_DIV256 (_CMU_LFAPRESC0_LETIMER0_DIV256 << 0)
1559 #define CMU_LFAPRESC0_LETIMER0_DIV512 (_CMU_LFAPRESC0_LETIMER0_DIV512 << 0)
1560 #define CMU_LFAPRESC0_LETIMER0_DIV1024 (_CMU_LFAPRESC0_LETIMER0_DIV1024 << 0)
1561 #define CMU_LFAPRESC0_LETIMER0_DIV2048 (_CMU_LFAPRESC0_LETIMER0_DIV2048 << 0)
1562 #define CMU_LFAPRESC0_LETIMER0_DIV4096 (_CMU_LFAPRESC0_LETIMER0_DIV4096 << 0)
1563 #define CMU_LFAPRESC0_LETIMER0_DIV8192 (_CMU_LFAPRESC0_LETIMER0_DIV8192 << 0)
1564 #define CMU_LFAPRESC0_LETIMER0_DIV16384 (_CMU_LFAPRESC0_LETIMER0_DIV16384 << 0)
1565 #define CMU_LFAPRESC0_LETIMER0_DIV32768 (_CMU_LFAPRESC0_LETIMER0_DIV32768 << 0)
1568 #define _CMU_LFBPRESC0_RESETVALUE 0x00000000UL
1569 #define _CMU_LFBPRESC0_MASK 0x00000003UL
1570 #define _CMU_LFBPRESC0_LEUART0_SHIFT 0
1571 #define _CMU_LFBPRESC0_LEUART0_MASK 0x3UL
1572 #define _CMU_LFBPRESC0_LEUART0_DIV1 0x00000000UL
1573 #define _CMU_LFBPRESC0_LEUART0_DIV2 0x00000001UL
1574 #define _CMU_LFBPRESC0_LEUART0_DIV4 0x00000002UL
1575 #define _CMU_LFBPRESC0_LEUART0_DIV8 0x00000003UL
1576 #define CMU_LFBPRESC0_LEUART0_DIV1 (_CMU_LFBPRESC0_LEUART0_DIV1 << 0)
1577 #define CMU_LFBPRESC0_LEUART0_DIV2 (_CMU_LFBPRESC0_LEUART0_DIV2 << 0)
1578 #define CMU_LFBPRESC0_LEUART0_DIV4 (_CMU_LFBPRESC0_LEUART0_DIV4 << 0)
1579 #define CMU_LFBPRESC0_LEUART0_DIV8 (_CMU_LFBPRESC0_LEUART0_DIV8 << 0)
1582 #define _CMU_LFEPRESC0_RESETVALUE 0x00000000UL
1583 #define _CMU_LFEPRESC0_MASK 0x0000000FUL
1584 #define _CMU_LFEPRESC0_RTCC_SHIFT 0
1585 #define _CMU_LFEPRESC0_RTCC_MASK 0xFUL
1586 #define _CMU_LFEPRESC0_RTCC_DIV1 0x00000000UL
1587 #define CMU_LFEPRESC0_RTCC_DIV1 (_CMU_LFEPRESC0_RTCC_DIV1 << 0)
1590 #define _CMU_SYNCBUSY_RESETVALUE 0x00000000UL
1591 #define _CMU_SYNCBUSY_MASK 0x3F050055UL
1592 #define CMU_SYNCBUSY_LFACLKEN0 (0x1UL << 0)
1593 #define _CMU_SYNCBUSY_LFACLKEN0_SHIFT 0
1594 #define _CMU_SYNCBUSY_LFACLKEN0_MASK 0x1UL
1595 #define _CMU_SYNCBUSY_LFACLKEN0_DEFAULT 0x00000000UL
1596 #define CMU_SYNCBUSY_LFACLKEN0_DEFAULT (_CMU_SYNCBUSY_LFACLKEN0_DEFAULT << 0)
1597 #define CMU_SYNCBUSY_LFAPRESC0 (0x1UL << 2)
1598 #define _CMU_SYNCBUSY_LFAPRESC0_SHIFT 2
1599 #define _CMU_SYNCBUSY_LFAPRESC0_MASK 0x4UL
1600 #define _CMU_SYNCBUSY_LFAPRESC0_DEFAULT 0x00000000UL
1601 #define CMU_SYNCBUSY_LFAPRESC0_DEFAULT (_CMU_SYNCBUSY_LFAPRESC0_DEFAULT << 2)
1602 #define CMU_SYNCBUSY_LFBCLKEN0 (0x1UL << 4)
1603 #define _CMU_SYNCBUSY_LFBCLKEN0_SHIFT 4
1604 #define _CMU_SYNCBUSY_LFBCLKEN0_MASK 0x10UL
1605 #define _CMU_SYNCBUSY_LFBCLKEN0_DEFAULT 0x00000000UL
1606 #define CMU_SYNCBUSY_LFBCLKEN0_DEFAULT (_CMU_SYNCBUSY_LFBCLKEN0_DEFAULT << 4)
1607 #define CMU_SYNCBUSY_LFBPRESC0 (0x1UL << 6)
1608 #define _CMU_SYNCBUSY_LFBPRESC0_SHIFT 6
1609 #define _CMU_SYNCBUSY_LFBPRESC0_MASK 0x40UL
1610 #define _CMU_SYNCBUSY_LFBPRESC0_DEFAULT 0x00000000UL
1611 #define CMU_SYNCBUSY_LFBPRESC0_DEFAULT (_CMU_SYNCBUSY_LFBPRESC0_DEFAULT << 6)
1612 #define CMU_SYNCBUSY_LFECLKEN0 (0x1UL << 16)
1613 #define _CMU_SYNCBUSY_LFECLKEN0_SHIFT 16
1614 #define _CMU_SYNCBUSY_LFECLKEN0_MASK 0x10000UL
1615 #define _CMU_SYNCBUSY_LFECLKEN0_DEFAULT 0x00000000UL
1616 #define CMU_SYNCBUSY_LFECLKEN0_DEFAULT (_CMU_SYNCBUSY_LFECLKEN0_DEFAULT << 16)
1617 #define CMU_SYNCBUSY_LFEPRESC0 (0x1UL << 18)
1618 #define _CMU_SYNCBUSY_LFEPRESC0_SHIFT 18
1619 #define _CMU_SYNCBUSY_LFEPRESC0_MASK 0x40000UL
1620 #define _CMU_SYNCBUSY_LFEPRESC0_DEFAULT 0x00000000UL
1621 #define CMU_SYNCBUSY_LFEPRESC0_DEFAULT (_CMU_SYNCBUSY_LFEPRESC0_DEFAULT << 18)
1622 #define CMU_SYNCBUSY_HFRCOBSY (0x1UL << 24)
1623 #define _CMU_SYNCBUSY_HFRCOBSY_SHIFT 24
1624 #define _CMU_SYNCBUSY_HFRCOBSY_MASK 0x1000000UL
1625 #define _CMU_SYNCBUSY_HFRCOBSY_DEFAULT 0x00000000UL
1626 #define CMU_SYNCBUSY_HFRCOBSY_DEFAULT (_CMU_SYNCBUSY_HFRCOBSY_DEFAULT << 24)
1627 #define CMU_SYNCBUSY_AUXHFRCOBSY (0x1UL << 25)
1628 #define _CMU_SYNCBUSY_AUXHFRCOBSY_SHIFT 25
1629 #define _CMU_SYNCBUSY_AUXHFRCOBSY_MASK 0x2000000UL
1630 #define _CMU_SYNCBUSY_AUXHFRCOBSY_DEFAULT 0x00000000UL
1631 #define CMU_SYNCBUSY_AUXHFRCOBSY_DEFAULT (_CMU_SYNCBUSY_AUXHFRCOBSY_DEFAULT << 25)
1632 #define CMU_SYNCBUSY_LFRCOBSY (0x1UL << 26)
1633 #define _CMU_SYNCBUSY_LFRCOBSY_SHIFT 26
1634 #define _CMU_SYNCBUSY_LFRCOBSY_MASK 0x4000000UL
1635 #define _CMU_SYNCBUSY_LFRCOBSY_DEFAULT 0x00000000UL
1636 #define CMU_SYNCBUSY_LFRCOBSY_DEFAULT (_CMU_SYNCBUSY_LFRCOBSY_DEFAULT << 26)
1637 #define CMU_SYNCBUSY_LFRCOVREFBSY (0x1UL << 27)
1638 #define _CMU_SYNCBUSY_LFRCOVREFBSY_SHIFT 27
1639 #define _CMU_SYNCBUSY_LFRCOVREFBSY_MASK 0x8000000UL
1640 #define _CMU_SYNCBUSY_LFRCOVREFBSY_DEFAULT 0x00000000UL
1641 #define CMU_SYNCBUSY_LFRCOVREFBSY_DEFAULT (_CMU_SYNCBUSY_LFRCOVREFBSY_DEFAULT << 27)
1642 #define CMU_SYNCBUSY_HFXOBSY (0x1UL << 28)
1643 #define _CMU_SYNCBUSY_HFXOBSY_SHIFT 28
1644 #define _CMU_SYNCBUSY_HFXOBSY_MASK 0x10000000UL
1645 #define _CMU_SYNCBUSY_HFXOBSY_DEFAULT 0x00000000UL
1646 #define CMU_SYNCBUSY_HFXOBSY_DEFAULT (_CMU_SYNCBUSY_HFXOBSY_DEFAULT << 28)
1647 #define CMU_SYNCBUSY_LFXOBSY (0x1UL << 29)
1648 #define _CMU_SYNCBUSY_LFXOBSY_SHIFT 29
1649 #define _CMU_SYNCBUSY_LFXOBSY_MASK 0x20000000UL
1650 #define _CMU_SYNCBUSY_LFXOBSY_DEFAULT 0x00000000UL
1651 #define CMU_SYNCBUSY_LFXOBSY_DEFAULT (_CMU_SYNCBUSY_LFXOBSY_DEFAULT << 29)
1654 #define _CMU_FREEZE_RESETVALUE 0x00000000UL
1655 #define _CMU_FREEZE_MASK 0x00000001UL
1656 #define CMU_FREEZE_REGFREEZE (0x1UL << 0)
1657 #define _CMU_FREEZE_REGFREEZE_SHIFT 0
1658 #define _CMU_FREEZE_REGFREEZE_MASK 0x1UL
1659 #define _CMU_FREEZE_REGFREEZE_DEFAULT 0x00000000UL
1660 #define _CMU_FREEZE_REGFREEZE_UPDATE 0x00000000UL
1661 #define _CMU_FREEZE_REGFREEZE_FREEZE 0x00000001UL
1662 #define CMU_FREEZE_REGFREEZE_DEFAULT (_CMU_FREEZE_REGFREEZE_DEFAULT << 0)
1663 #define CMU_FREEZE_REGFREEZE_UPDATE (_CMU_FREEZE_REGFREEZE_UPDATE << 0)
1664 #define CMU_FREEZE_REGFREEZE_FREEZE (_CMU_FREEZE_REGFREEZE_FREEZE << 0)
1667 #define _CMU_PCNTCTRL_RESETVALUE 0x00000000UL
1668 #define _CMU_PCNTCTRL_MASK 0x00000003UL
1669 #define CMU_PCNTCTRL_PCNT0CLKEN (0x1UL << 0)
1670 #define _CMU_PCNTCTRL_PCNT0CLKEN_SHIFT 0
1671 #define _CMU_PCNTCTRL_PCNT0CLKEN_MASK 0x1UL
1672 #define _CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT 0x00000000UL
1673 #define CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT (_CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT << 0)
1674 #define CMU_PCNTCTRL_PCNT0CLKSEL (0x1UL << 1)
1675 #define _CMU_PCNTCTRL_PCNT0CLKSEL_SHIFT 1
1676 #define _CMU_PCNTCTRL_PCNT0CLKSEL_MASK 0x2UL
1677 #define _CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT 0x00000000UL
1678 #define _CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK 0x00000000UL
1679 #define _CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 0x00000001UL
1680 #define CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT (_CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT << 1)
1681 #define CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK (_CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK << 1)
1682 #define CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 (_CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 << 1)
1685 #define _CMU_ADCCTRL_RESETVALUE 0x00000000UL
1686 #define _CMU_ADCCTRL_MASK 0x00000130UL
1687 #define _CMU_ADCCTRL_ADC0CLKSEL_SHIFT 4
1688 #define _CMU_ADCCTRL_ADC0CLKSEL_MASK 0x30UL
1689 #define _CMU_ADCCTRL_ADC0CLKSEL_DEFAULT 0x00000000UL
1690 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL
1691 #define _CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO 0x00000001UL
1692 #define _CMU_ADCCTRL_ADC0CLKSEL_HFXO 0x00000002UL
1693 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL
1694 #define CMU_ADCCTRL_ADC0CLKSEL_DEFAULT (_CMU_ADCCTRL_ADC0CLKSEL_DEFAULT << 4)
1695 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4)
1696 #define CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO (_CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO << 4)
1697 #define CMU_ADCCTRL_ADC0CLKSEL_HFXO (_CMU_ADCCTRL_ADC0CLKSEL_HFXO << 4)
1698 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4)
1699 #define CMU_ADCCTRL_ADC0CLKINV (0x1UL << 8)
1700 #define _CMU_ADCCTRL_ADC0CLKINV_SHIFT 8
1701 #define _CMU_ADCCTRL_ADC0CLKINV_MASK 0x100UL
1702 #define _CMU_ADCCTRL_ADC0CLKINV_DEFAULT 0x00000000UL
1703 #define CMU_ADCCTRL_ADC0CLKINV_DEFAULT (_CMU_ADCCTRL_ADC0CLKINV_DEFAULT << 8)
1706 #define _CMU_ROUTEPEN_RESETVALUE 0x00000000UL
1707 #define _CMU_ROUTEPEN_MASK 0x00000003UL
1708 #define CMU_ROUTEPEN_CLKOUT0PEN (0x1UL << 0)
1709 #define _CMU_ROUTEPEN_CLKOUT0PEN_SHIFT 0
1710 #define _CMU_ROUTEPEN_CLKOUT0PEN_MASK 0x1UL
1711 #define _CMU_ROUTEPEN_CLKOUT0PEN_DEFAULT 0x00000000UL
1712 #define CMU_ROUTEPEN_CLKOUT0PEN_DEFAULT (_CMU_ROUTEPEN_CLKOUT0PEN_DEFAULT << 0)
1713 #define CMU_ROUTEPEN_CLKOUT1PEN (0x1UL << 1)
1714 #define _CMU_ROUTEPEN_CLKOUT1PEN_SHIFT 1
1715 #define _CMU_ROUTEPEN_CLKOUT1PEN_MASK 0x2UL
1716 #define _CMU_ROUTEPEN_CLKOUT1PEN_DEFAULT 0x00000000UL
1717 #define CMU_ROUTEPEN_CLKOUT1PEN_DEFAULT (_CMU_ROUTEPEN_CLKOUT1PEN_DEFAULT << 1)
1720 #define _CMU_ROUTELOC0_RESETVALUE 0x00000000UL
1721 #define _CMU_ROUTELOC0_MASK 0x00000707UL
1722 #define _CMU_ROUTELOC0_CLKOUT0LOC_SHIFT 0
1723 #define _CMU_ROUTELOC0_CLKOUT0LOC_MASK 0x7UL
1724 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC0 0x00000000UL
1725 #define _CMU_ROUTELOC0_CLKOUT0LOC_DEFAULT 0x00000000UL
1726 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC1 0x00000001UL
1727 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC2 0x00000002UL
1728 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC3 0x00000003UL
1729 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC4 0x00000004UL
1730 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC5 0x00000005UL
1731 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC6 0x00000006UL
1732 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC7 0x00000007UL
1733 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC0 (_CMU_ROUTELOC0_CLKOUT0LOC_LOC0 << 0)
1734 #define CMU_ROUTELOC0_CLKOUT0LOC_DEFAULT (_CMU_ROUTELOC0_CLKOUT0LOC_DEFAULT << 0)
1735 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC1 (_CMU_ROUTELOC0_CLKOUT0LOC_LOC1 << 0)
1736 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC2 (_CMU_ROUTELOC0_CLKOUT0LOC_LOC2 << 0)
1737 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC3 (_CMU_ROUTELOC0_CLKOUT0LOC_LOC3 << 0)
1738 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC4 (_CMU_ROUTELOC0_CLKOUT0LOC_LOC4 << 0)
1739 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC5 (_CMU_ROUTELOC0_CLKOUT0LOC_LOC5 << 0)
1740 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC6 (_CMU_ROUTELOC0_CLKOUT0LOC_LOC6 << 0)
1741 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC7 (_CMU_ROUTELOC0_CLKOUT0LOC_LOC7 << 0)
1742 #define _CMU_ROUTELOC0_CLKOUT1LOC_SHIFT 8
1743 #define _CMU_ROUTELOC0_CLKOUT1LOC_MASK 0x700UL
1744 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC0 0x00000000UL
1745 #define _CMU_ROUTELOC0_CLKOUT1LOC_DEFAULT 0x00000000UL
1746 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC1 0x00000001UL
1747 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC2 0x00000002UL
1748 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC3 0x00000003UL
1749 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC4 0x00000004UL
1750 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC5 0x00000005UL
1751 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC6 0x00000006UL
1752 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC7 0x00000007UL
1753 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC0 (_CMU_ROUTELOC0_CLKOUT1LOC_LOC0 << 8)
1754 #define CMU_ROUTELOC0_CLKOUT1LOC_DEFAULT (_CMU_ROUTELOC0_CLKOUT1LOC_DEFAULT << 8)
1755 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC1 (_CMU_ROUTELOC0_CLKOUT1LOC_LOC1 << 8)
1756 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC2 (_CMU_ROUTELOC0_CLKOUT1LOC_LOC2 << 8)
1757 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC3 (_CMU_ROUTELOC0_CLKOUT1LOC_LOC3 << 8)
1758 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC4 (_CMU_ROUTELOC0_CLKOUT1LOC_LOC4 << 8)
1759 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC5 (_CMU_ROUTELOC0_CLKOUT1LOC_LOC5 << 8)
1760 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC6 (_CMU_ROUTELOC0_CLKOUT1LOC_LOC6 << 8)
1761 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC7 (_CMU_ROUTELOC0_CLKOUT1LOC_LOC7 << 8)
1764 #define _CMU_LOCK_RESETVALUE 0x00000000UL
1765 #define _CMU_LOCK_MASK 0x0000FFFFUL
1766 #define _CMU_LOCK_LOCKKEY_SHIFT 0
1767 #define _CMU_LOCK_LOCKKEY_MASK 0xFFFFUL
1768 #define _CMU_LOCK_LOCKKEY_DEFAULT 0x00000000UL
1769 #define _CMU_LOCK_LOCKKEY_LOCK 0x00000000UL
1770 #define _CMU_LOCK_LOCKKEY_UNLOCKED 0x00000000UL
1771 #define _CMU_LOCK_LOCKKEY_LOCKED 0x00000001UL
1772 #define _CMU_LOCK_LOCKKEY_UNLOCK 0x0000580EUL
1773 #define CMU_LOCK_LOCKKEY_DEFAULT (_CMU_LOCK_LOCKKEY_DEFAULT << 0)
1774 #define CMU_LOCK_LOCKKEY_LOCK (_CMU_LOCK_LOCKKEY_LOCK << 0)
1775 #define CMU_LOCK_LOCKKEY_UNLOCKED (_CMU_LOCK_LOCKKEY_UNLOCKED << 0)
1776 #define CMU_LOCK_LOCKKEY_LOCKED (_CMU_LOCK_LOCKKEY_LOCKED << 0)
1777 #define CMU_LOCK_LOCKKEY_UNLOCK (_CMU_LOCK_LOCKKEY_UNLOCK << 0)
__IO uint32_t HFCOREPRESC
__IO uint32_t HFXOSTARTUPCTRL
__I uint32_t HFXOTRIMSTATUS
__IO uint32_t HFXOTIMEOUTCTRL
__IO uint32_t AUXHFRCOCTRL
__IO uint32_t HFXOSTEADYSTATECTRL
__IO uint32_t HFBUSCLKEN0
__IO uint32_t HFPERCLKEN0