EFM32 Pearl Gecko Software Documentation
efm32pg1-doc-4.2.1
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Energy Management Unit (EMU) Peripheral API
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Data Structures | |
struct | EMU_EM23Init_TypeDef |
struct | EMU_EM4Init_TypeDef |
struct | EMU_DCDCInit_TypeDef |
struct | EMU_VmonInit_TypeDef |
struct | EMU_VmonHystInit_TypeDef |
Macros | |
#define | EMU_EM23INIT_DEFAULT { false } /* Reduced voltage regulator drive strength in EM2 and EM3 */ |
#define | EMU_EM4INIT_DEFAULT |
#define | EMU_DCDCINIT_DEFAULT |
#define | EMU_VMONINIT_DEFAULT |
#define | EMU_VMONHYSTINIT_DEFAULT |
#define | PWRCFG_DCDCTODVDD_VMIN 1200 |
#define | PWRCFG_DCDCTODVDD_VMAX 3000 |
Enumerations | |
enum | EMU_BODMode_TypeDef { emuBODMode_Active, emuBODMode_Inactive } |
enum | EMU_EM4State_TypeDef { emuEM4Hibernate = EMU_EM4CTRL_EM4STATE_EM4H, emuEM4Shutoff = EMU_EM4CTRL_EM4STATE_EM4S } |
enum | EMU_EM4PinRetention_TypeDef { emuPinRetentionDisable = EMU_EM4CTRL_EM4IORETMODE_DISABLE, emuPinRetentionEm4Exit = EMU_EM4CTRL_EM4IORETMODE_EM4EXIT, emuPinRetentionLatch = EMU_EM4CTRL_EM4IORETMODE_SWUNLATCH } |
enum | EMU_PowerConfig_TypeDef { emuPowerConfig_DcdcToDvdd = EMU_PWRCFG_PWRCFG_DCDCTODVDD } |
enum | EMU_DcdcMode_TypeDef { emuDcdcMode_Bypass = EMU_DCDCCTRL_DCDCMODE_BYPASS, emuDcdcMode_LowNoise = EMU_DCDCCTRL_DCDCMODE_LOWNOISE } |
enum | EMU_DcdcAnaPeripheralPower_TypeDef { emuDcdcAnaPeripheralPower_AVDD = EMU_PWRCTRL_ANASW_AVDD, emuDcdcAnaPeripheralPower_DCDC = EMU_PWRCTRL_ANASW_DVDD } |
enum | EMU_DcdcLnTransientMode_TypeDef { emuDcdcLnHighEfficiency = 0, emuDcdcLnFastTransient = EMU_DCDCMISCCTRL_LNFORCECCM } |
enum | EMU_DcdcLnRcoBand_TypeDef { EMU_DcdcLnRcoBand_3MHz = 0, EMU_DcdcLnRcoBand_4MHz = 1, EMU_DcdcLnRcoBand_5MHz = 2, EMU_DcdcLnRcoBand_6MHz = 3, EMU_DcdcLnRcoBand_7MHz = 4, EMU_DcdcLnRcoBand_8MHz = 5, EMU_DcdcLnRcoBand_9MHz = 6, EMU_DcdcLnRcoBand_10MHz = 7 } |
enum | EMU_VmonChannel_TypeDef { emuVmonChannel_AVDD, emuVmonChannel_ALTAVDD, emuVmonChannel_DVDD, emuVmonChannel_IOVDD0 } |
enum | errataFixDcdcHs_TypeDef { errataFixDcdcHsInit, errataFixDcdcHsTrimSet, errataFixDcdcHsLnWaitDone } |
Functions | |
__STATIC_INLINE void | EMU_EnterEM1 (void) |
Enter energy mode 1 (EM1). | |
void | EMU_EM23Init (EMU_EM23Init_TypeDef *em23Init) |
Update EMU module with Energy Mode 2 and 3 configuration. More... | |
void | EMU_EM4Init (EMU_EM4Init_TypeDef *em4Init) |
Update EMU module with Energy Mode 4 configuration. More... | |
void | EMU_EnterEM2 (bool restore) |
Enter energy mode 2 (EM2). More... | |
void | EMU_EnterEM3 (bool restore) |
Enter energy mode 3 (EM3). More... | |
void | EMU_EnterEM4 (void) |
Enter energy mode 4 (EM4). More... | |
void | EMU_MemPwrDown (uint32_t blocks) |
Power down memory block. More... | |
void | EMU_UpdateOscConfig (void) |
Update EMU module with CMU oscillator selection/enable status. More... | |
bool | EMU_DCDCInit (EMU_DCDCInit_TypeDef *dcdcInit) |
Configure DCDC regulator. More... | |
void | EMU_DCDCModeSet (EMU_DcdcMode_TypeDef dcdcMode) |
Set DCDC regulator operating mode. More... | |
bool | EMU_DCDCOutputVoltageSet (uint32_t mV, bool setLpVoltage, bool setLnVoltage) |
Set DCDC output voltage. More... | |
void | EMU_DCDCOptimizeSlice (uint32_t mAEm0LoadCurrent) |
Optimize DCDC slice count based on the estimated average load current in EM0. More... | |
void | EMU_DCDCLnRcoBandSet (EMU_DcdcLnRcoBand_TypeDef band) |
Set DCDC Low-noise RCO band. More... | |
bool | EMU_DCDCPowerOff (void) |
Power off the DCDC regulator. More... | |
void | EMU_VmonInit (EMU_VmonInit_TypeDef *vmonInit) |
Initialize VMON channel. More... | |
void | EMU_VmonHystInit (EMU_VmonHystInit_TypeDef *vmonInit) |
Initialize VMON channel with hysteresis (separate rise and fall triggers). More... | |
void | EMU_VmonEnable (EMU_VmonChannel_TypeDef channel, bool enable) |
Enable or disable a VMON channel. More... | |
bool | EMU_VmonChannelStatusGet (EMU_VmonChannel_TypeDef channel) |
Get the status of a voltage monitor channel. More... | |
__STATIC_INLINE bool | EMU_VmonStatusGet (void) |
Get the status of the voltage monitor (VMON). More... | |
__STATIC_INLINE void | EMU_IntClear (uint32_t flags) |
Clear one or more pending EMU interrupts. More... | |
__STATIC_INLINE void | EMU_IntDisable (uint32_t flags) |
Disable one or more EMU interrupts. More... | |
__STATIC_INLINE void | EMU_IntEnable (uint32_t flags) |
Enable one or more EMU interrupts. More... | |
__STATIC_INLINE uint32_t | EMU_IntGet (void) |
Get pending EMU interrupt flags. More... | |
__STATIC_INLINE uint32_t | EMU_IntGetEnabled (void) |
Get enabled and pending EMU interrupt flags. Useful for handling more interrupt sources in the same interrupt handler. More... | |
__STATIC_INLINE void | EMU_IntSet (uint32_t flags) |
Set one or more pending EMU interrupts. More... | |
__STATIC_INLINE void | EMU_Lock (void) |
Lock the EMU in order to protect its registers against unintended modification. More... | |
__STATIC_INLINE void | EMU_Unlock (void) |
Unlock the EMU so that writing to locked registers again is possible. | |
__STATIC_INLINE void | EMU_PowerLock (void) |
Lock the EMU regulator control registers in order to protect against unintended modification. | |
__STATIC_INLINE void | EMU_PowerUnlock (void) |
Unlock the EMU power control registers so that writing to locked registers again is possible. | |
__STATIC_INLINE void | EMU_EM2Block (void) |
Block entering EM2 or higher number energy modes. | |
__STATIC_INLINE void | EMU_EM2UnBlock (void) |
Unblock entering EM2 or higher number energy modes. | |
__STATIC_INLINE void | EMU_UnlatchPinRetention (void) |
When EM4 pin retention is set to emuPinRetentionLatch, then pins are retained through EM4 entry and wakeup. The pin state is released by calling this function. The feature allows peripherals or GPIO to be re-initialized after EM4 exit (reset), and when the initialization is done, this function can release pins and return control to the peripherals or GPIO. | |
Variables | |
errataFixDcdcHs_TypeDef | errataFixDcdcHsState = errataFixDcdcHsInit |
#define EMU_EM23INIT_DEFAULT { false } /* Reduced voltage regulator drive strength in EM2 and EM3 */ |
#define EMU_EM4INIT_DEFAULT |
Default initialization of EM4 configuration
#define EMU_DCDCINIT_DEFAULT |
Default DCDC initialization
#define EMU_VMONINIT_DEFAULT |
Default VMON initialization structure
#define EMU_VMONHYSTINIT_DEFAULT |
Default VMON Hysteresis initialization structure
enum EMU_BODMode_TypeDef |
enum EMU_EM4State_TypeDef |
Enumerator | |
---|---|
emuPinRetentionDisable |
No Retention: Pads enter reset state when entering EM4 |
emuPinRetentionEm4Exit |
Retention through EM4: Pads enter reset state when exiting EM4 |
emuPinRetentionLatch |
Retention through EM4 and wakeup: call EMU_UnlatchPinRetention() to release pins from retention after EM4 wakeup |
enum EMU_DcdcMode_TypeDef |
DCDC to DVDD mode analog peripheral power supply select
DCDC Low-noise RCO band select
void EMU_EM23Init | ( | EMU_EM23Init_TypeDef * | em23Init | ) |
[in] | em23Init | Energy Mode 2 and 3 configuration structure |
Definition at line 753 of file em_emu.c.
References EMU_EM23Init_TypeDef::em23VregFullEn, and EMU.
void EMU_EM4Init | ( | EMU_EM4Init_TypeDef * | em4Init | ) |
[in] | em4Init | Energy Mode 4 configuration structure |
Definition at line 775 of file em_emu.c.
References _EMU_EM4CTRL_EM4IORETMODE_MASK, _EMU_EM4CTRL_EM4STATE_MASK, _EMU_EM4CTRL_RETAINLFRCO_MASK, _EMU_EM4CTRL_RETAINLFXO_MASK, _EMU_EM4CTRL_RETAINULFRCO_MASK, EMU_EM4Init_TypeDef::em4State, EMU, EMU_EM4CTRL_EM4STATE_EM4H, EMU_EM4CTRL_RETAINLFRCO, EMU_EM4CTRL_RETAINLFXO, EMU_EM4CTRL_RETAINULFRCO, EMU_EM4Init_TypeDef::pinRetentionMode, EMU_EM4Init_TypeDef::retainLfrco, EMU_EM4Init_TypeDef::retainLfxo, and EMU_EM4Init_TypeDef::retainUlfrco.
void EMU_EnterEM2 | ( | bool | restore | ) |
When entering EM2, the high frequency clocks are disabled, ie HFXO, HFRCO and AUXHFRCO (for AUXHFRCO, see exception note below). When re-entering EM0, HFRCO is re-enabled and the core will be clocked by the configured HFRCO band. This ensures a quick wakeup from EM2.
However, prior to entering EM2, the core may have been using another oscillator than HFRCO. The restore
parameter gives the user the option to restore all HF oscillators according to state prior to entering EM2, as well as the clock used to clock the core. This restore procedure is handled by SW. However, since handled by SW, it will not be restored before completing the interrupt function(s) waking up the core!
restore
parameter. restore
parameter when waking up on the wakeup sources corresponding to the autostart and select setting.[in] | restore |
|
restore
option should only be used if all clock control is done via the CMU API. Definition at line 413 of file em_emu.c.
References CMU, CMU_HFCLKSTATUS_SELECTED_HFRCO, and SystemCoreClockUpdate().
Referenced by CAPLESENSE_Sleep().
void EMU_EnterEM3 | ( | bool | restore | ) |
When entering EM3, the high frequency clocks are disabled by HW, ie HFXO, HFRCO and AUXHFRCO (for AUXHFRCO, see exception note below). In addition, the low frequency clocks, ie LFXO and LFRCO are disabled by SW. When re-entering EM0, HFRCO is re-enabled and the core will be clocked by the configured HFRCO band. This ensures a quick wakeup from EM3.
However, prior to entering EM3, the core may have been using another oscillator than HFRCO. The restore
parameter gives the user the option to restore all HF/LF oscillators according to state prior to entering EM3, as well as the clock used to clock the core. This restore procedure is handled by SW. However, since handled by SW, it will not be restored before completing the interrupt function(s) waking up the core!
restore
parameter.[in] | restore |
|
restore
option should only be used if all clock control is done via the CMU API. Definition at line 529 of file em_emu.c.
References CMU, CMU_HFCLKSTATUS_SELECTED_HFRCO, CMU_Lock(), CMU_LOCK_LOCKKEY_LOCKED, CMU_OSCENCMD_LFRCODIS, CMU_OSCENCMD_LFXODIS, CMU_Unlock(), and SystemCoreClockUpdate().
void EMU_EnterEM4 | ( | void | ) |
Definition at line 626 of file em_emu.c.
References _EMU_EM4CTRL_EM4ENTRY_MASK, _EMU_EM4CTRL_EM4ENTRY_SHIFT, EMU, and EMU_Unlock().
void EMU_MemPwrDown | ( | uint32_t | blocks | ) |
[in] | blocks | Specifies a logical OR of bits indicating memory blocks to power down. Bit 0 selects block 1, bit 1 selects block 2, etc. Memory block 0 cannot be disabled. Please refer to the reference manual for available memory blocks for a device. |
Definition at line 687 of file em_emu.c.
References _EMU_RAM0CTRL_RAMPOWERDOWN_MASK, and EMU.
void EMU_UpdateOscConfig | ( | void | ) |
When entering EM2 and EM3, the HW may change the core clock oscillator used, as well as disabling some oscillators. The user may optionally select to restore the oscillators after waking up from EM2 and EM3 through the SW API.
However, in order to support this in a safe way, the EMU module must be kept up-to-date on the actual selected configuration. The CMU module must keep the EMU module up-to-date.
This function is mainly intended for internal use by the CMU module, but if the applications changes oscillator configurations without using the CMU API, this function can be used to keep the EMU module up-to-date.
Definition at line 736 of file em_emu.c.
References CMU.
Referenced by CMU_ClockSelectSet(), and CMU_OscillatorEnable().
bool EMU_DCDCInit | ( | EMU_DCDCInit_TypeDef * | dcdcInit | ) |
[in] | dcdcInit | DCDC initialization structure |
Definition at line 1204 of file em_emu.c.
References _EMU_DCDCMISCCTRL_LNFORCECCM_MASK, _EMU_DCDCMISCCTRL_LPCMPBIAS_MASK, _EMU_PWRCFG_PWRCFG_MASK, _EMU_PWRCTRL_ANASW_SHIFT, EMU_DCDCInit_TypeDef::anaPeripheralPower, BUS_RegBitWrite(), EMU_DCDCInit_TypeDef::dcdcMode, EMU_DCDCInit_TypeDef::em01LoadCurrent_mA, EMU_DCDCInit_TypeDef::em234LoadCurrent_uA, EMU, EMU_DCDCMISCCTRL_LPCMPBIAS_BIAS0, EMU_DCDCMISCCTRL_LPCMPBIAS_BIAS1, EMU_DCDCModeSet(), EMU_DCDCOptimizeSlice(), EMU_DCDCOutputVoltageSet(), emuDcdcMode_LowNoise, EMU_DCDCInit_TypeDef::lnTransientMode, EMU_DCDCInit_TypeDef::maxCurrent_mA, EMU_DCDCInit_TypeDef::mVout, and EMU_DCDCInit_TypeDef::powerConfig.
void EMU_DCDCModeSet | ( | EMU_DcdcMode_TypeDef | dcdcMode | ) |
[in] | dcdcMode | DCDC mode |
Definition at line 1182 of file em_emu.c.
References _EMU_DCDCCLIMCTRL_BYPLIMEN_SHIFT, _EMU_DCDCCTRL_DCDCMODE_MASK, BUS_RegBitWrite(), EMU, EMU_DCDCSYNC_DCDCCTRLBUSY, and emuDcdcMode_Bypass.
Referenced by EMU_DCDCInit().
bool EMU_DCDCOutputVoltageSet | ( | uint32_t | mV, |
bool | setLpVoltage, | ||
bool | setLnVoltage | ||
) |
[in] | mV | Target DCDC output voltage in mV |
Definition at line 1291 of file em_emu.c.
References _DEVINFO_DCDCLNVCTRL0_1V2LNATT0_MASK, _DEVINFO_DCDCLNVCTRL0_1V2LNATT0_SHIFT, _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_MASK, _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_SHIFT, _DEVINFO_DCDCLNVCTRL0_1V8LNATT1_MASK, _DEVINFO_DCDCLNVCTRL0_1V8LNATT1_SHIFT, _DEVINFO_DCDCLNVCTRL0_3V0LNATT1_MASK, _DEVINFO_DCDCLNVCTRL0_3V0LNATT1_SHIFT, _DEVINFO_DCDCLPVCTRL0_1V2LPATT0LPCMPBIAS0_MASK, _DEVINFO_DCDCLPVCTRL0_1V2LPATT0LPCMPBIAS0_SHIFT, _DEVINFO_DCDCLPVCTRL0_1V2LPATT0LPCMPBIAS1_MASK, _DEVINFO_DCDCLPVCTRL0_1V2LPATT0LPCMPBIAS1_SHIFT, _DEVINFO_DCDCLPVCTRL0_1V8LPATT0LPCMPBIAS0_MASK, _DEVINFO_DCDCLPVCTRL0_1V8LPATT0LPCMPBIAS0_SHIFT, _DEVINFO_DCDCLPVCTRL0_1V8LPATT0LPCMPBIAS1_MASK, _DEVINFO_DCDCLPVCTRL0_1V8LPATT0LPCMPBIAS1_SHIFT, _DEVINFO_DCDCLPVCTRL1_1V2LPATT0LPCMPBIAS2_MASK, _DEVINFO_DCDCLPVCTRL1_1V2LPATT0LPCMPBIAS2_SHIFT, _DEVINFO_DCDCLPVCTRL1_1V2LPATT0LPCMPBIAS3_MASK, _DEVINFO_DCDCLPVCTRL1_1V2LPATT0LPCMPBIAS3_SHIFT, _DEVINFO_DCDCLPVCTRL1_1V8LPATT0LPCMPBIAS2_MASK, _DEVINFO_DCDCLPVCTRL1_1V8LPATT0LPCMPBIAS2_SHIFT, _DEVINFO_DCDCLPVCTRL1_1V8LPATT0LPCMPBIAS3_MASK, _DEVINFO_DCDCLPVCTRL1_1V8LPATT0LPCMPBIAS3_SHIFT, _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS0_MASK, _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS0_SHIFT, _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS1_MASK, _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS1_SHIFT, _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS0_MASK, _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS0_SHIFT, _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS1_MASK, _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS1_SHIFT, _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS2_MASK, _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS2_SHIFT, _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS3_MASK, _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS3_SHIFT, _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS2_MASK, _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS2_SHIFT, _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS3_MASK, _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS3_SHIFT, _EMU_DCDCLNVCTRL_LNVREF_SHIFT, _EMU_DCDCLPVCTRL_LPVREF_SHIFT, _EMU_DCDCMISCCTRL_LPCMPBIAS_MASK, _EMU_DCDCMISCCTRL_LPCMPBIAS_SHIFT, _EMU_PWRCFG_PWRCFG_MASK, DEVINFO, EMU, EMU_DCDCLNVCTRL_LNATT, EMU_DCDCLPVCTRL_LPATT, EMU_DCDCMISCCTRL_LPCMPBIAS_BIAS0, EMU_DCDCMISCCTRL_LPCMPBIAS_BIAS1, EMU_DCDCMISCCTRL_LPCMPBIAS_BIAS2, EMU_DCDCMISCCTRL_LPCMPBIAS_BIAS3, and EMU_PWRCFG_PWRCFG_DCDCTODVDD.
Referenced by EMU_DCDCInit().
void EMU_DCDCOptimizeSlice | ( | uint32_t | mAEm0LoadCurrent | ) |
[in] | mAEm0LoadCurrent | Estimated average EM0 load current in mA. |
Definition at line 1499 of file em_emu.c.
References _EMU_DCDCLNFREQCTRL_RCOBAND_MASK, _EMU_DCDCLNFREQCTRL_RCOBAND_SHIFT, _EMU_DCDCMISCCTRL_LNFORCECCM_MASK, _EMU_DCDCMISCCTRL_NFETCNT_MASK, _EMU_DCDCMISCCTRL_NFETCNT_SHIFT, _EMU_DCDCMISCCTRL_PFETCNT_MASK, _EMU_DCDCMISCCTRL_PFETCNT_SHIFT, EMU, EMU_DcdcLnRcoBand_4MHz, and EMU_DcdcLnRcoBand_5MHz.
Referenced by EMU_DCDCInit().
void EMU_DCDCLnRcoBandSet | ( | EMU_DcdcLnRcoBand_TypeDef | band | ) |
[in] | band | RCO band to set. |
Definition at line 1575 of file em_emu.c.
References _EMU_DCDCLNFREQCTRL_RCOBAND_MASK, _EMU_DCDCLNFREQCTRL_RCOBAND_SHIFT, and EMU.
bool EMU_DCDCPowerOff | ( | void | ) |
This function powers off the DCDC controller. This function should only be used if the external power circuit is wired for no DCDC. If the external power circuit is wired for DCDC usage, then use EMU_DCDCInit() and set the DCDC in bypass mode to disable DCDC.
Definition at line 1594 of file em_emu.c.
References _EMU_PWRCFG_PWRCFG_MASK, EMU, and EMU_DCDCCTRL_DCDCMODE_OFF.
void EMU_VmonInit | ( | EMU_VmonInit_TypeDef * | vmonInit | ) |
Initialize a VMON channel without hysteresis. If the channel supports separate rise and fall triggers, both thresholds will be set to the same value.
[in] | vmonInit | VMON initialization struct |
Definition at line 1637 of file em_emu.c.
References _EMU_VMONALTAVDDCTRL_THRESCOARSE_SHIFT, _EMU_VMONALTAVDDCTRL_THRESFINE_SHIFT, _EMU_VMONAVDDCTRL_FALLTHRESCOARSE_SHIFT, _EMU_VMONAVDDCTRL_FALLTHRESFINE_SHIFT, _EMU_VMONAVDDCTRL_RISETHRESCOARSE_SHIFT, _EMU_VMONAVDDCTRL_RISETHRESFINE_SHIFT, _EMU_VMONDVDDCTRL_THRESCOARSE_SHIFT, _EMU_VMONDVDDCTRL_THRESFINE_SHIFT, _EMU_VMONIO0CTRL_THRESCOARSE_SHIFT, _EMU_VMONIO0CTRL_THRESFINE_SHIFT, EMU_VmonInit_TypeDef::channel, EMU, EMU_VMONALTAVDDCTRL_EN, EMU_VMONALTAVDDCTRL_FALLWU, EMU_VMONALTAVDDCTRL_RISEWU, EMU_VMONAVDDCTRL_EN, EMU_VMONAVDDCTRL_FALLWU, EMU_VMONAVDDCTRL_RISEWU, EMU_VMONDVDDCTRL_EN, EMU_VMONDVDDCTRL_FALLWU, EMU_VMONDVDDCTRL_RISEWU, EMU_VMONIO0CTRL_EN, EMU_VMONIO0CTRL_FALLWU, EMU_VMONIO0CTRL_RETDIS, EMU_VMONIO0CTRL_RISEWU, EMU_VmonInit_TypeDef::enable, EMU_VmonInit_TypeDef::fallWakeup, EMU_VmonInit_TypeDef::retDisable, EMU_VmonInit_TypeDef::riseWakeup, and EMU_VmonInit_TypeDef::threshold.
void EMU_VmonHystInit | ( | EMU_VmonHystInit_TypeDef * | vmonInit | ) |
Initialize a VMON channel which supports hysteresis. The AVDD channel is the only channel to support separate rise and fall triggers.
[in] | vmonInit | VMON Hysteresis initialization struct |
Definition at line 1695 of file em_emu.c.
References _EMU_VMONAVDDCTRL_FALLTHRESCOARSE_SHIFT, _EMU_VMONAVDDCTRL_FALLTHRESFINE_SHIFT, _EMU_VMONAVDDCTRL_RISETHRESCOARSE_SHIFT, _EMU_VMONAVDDCTRL_RISETHRESFINE_SHIFT, EMU_VmonHystInit_TypeDef::channel, EMU, EMU_VMONAVDDCTRL_EN, EMU_VMONAVDDCTRL_FALLWU, EMU_VMONAVDDCTRL_RISEWU, EMU_VmonHystInit_TypeDef::enable, EMU_VmonHystInit_TypeDef::fallThreshold, EMU_VmonHystInit_TypeDef::fallWakeup, EMU_VmonHystInit_TypeDef::riseThreshold, and EMU_VmonHystInit_TypeDef::riseWakeup.
void EMU_VmonEnable | ( | EMU_VmonChannel_TypeDef | channel, |
bool | enable | ||
) |
[in] | channel | VMON channel to enable/disable |
[in] | enable | Whether to enable or disable |
Definition at line 1736 of file em_emu.c.
References _EMU_VMONALTAVDDCTRL_EN_SHIFT, _EMU_VMONAVDDCTRL_EN_SHIFT, _EMU_VMONDVDDCTRL_EN_SHIFT, _EMU_VMONIO0CTRL_EN_SHIFT, BUS_RegBitWrite(), and EMU.
bool EMU_VmonChannelStatusGet | ( | EMU_VmonChannel_TypeDef | channel | ) |
[in] | channel | VMON channel to get status for |
Definition at line 1777 of file em_emu.c.
References _EMU_STATUS_VMONALTAVDD_SHIFT, _EMU_STATUS_VMONAVDD_SHIFT, _EMU_STATUS_VMONDVDD_SHIFT, _EMU_STATUS_VMONIO0_SHIFT, BUS_RegBitRead(), and EMU.
__STATIC_INLINE bool EMU_VmonStatusGet | ( | void | ) |
Definition at line 491 of file em_emu.h.
References _EMU_STATUS_VMONRDY_SHIFT, BUS_RegBitRead(), and EMU.
__STATIC_INLINE void EMU_IntClear | ( | uint32_t | flags | ) |
__STATIC_INLINE void EMU_IntDisable | ( | uint32_t | flags | ) |
__STATIC_INLINE void EMU_IntEnable | ( | uint32_t | flags | ) |
[in] | flags | EMU interrupt sources to enable. Use one or more valid interrupt flags for the EMU module (EMU_IEN_nnn). |
Definition at line 539 of file em_emu.h.
References EMU.
__STATIC_INLINE uint32_t EMU_IntGet | ( | void | ) |
__STATIC_INLINE uint32_t EMU_IntGetEnabled | ( | void | ) |
__STATIC_INLINE void EMU_IntSet | ( | uint32_t | flags | ) |
__STATIC_INLINE void EMU_Lock | ( | void | ) |
Definition at line 650 of file em_emu.h.
References EMU, and EMU_LOCK_LOCKKEY_LOCK.
Referenced by RMU_ResetCauseClear().