EFM32 Pearl Gecko Software Documentation  efm32pg1-doc-4.2.1
em_rtcc.h
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1 /***************************************************************************/
33 #ifndef __SILICON_LABS_EM_RTCC_H__
34 #define __SILICON_LABS_EM_RTCC_H__
35 
36 #include "em_device.h"
37 #if defined( RTCC_COUNT ) && ( RTCC_COUNT == 1 )
38 
39 #include <stdbool.h>
40 #include "em_assert.h"
41 
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45 
46 /***************************************************************************/
51 /***************************************************************************/
56 /*******************************************************************************
57  ********************************* ENUM ************************************
58  ******************************************************************************/
59 
61 typedef enum
62 {
65 
70 
72 typedef enum
73 {
91 
92 
94 typedef enum
95 {
98 
103 
104 
106 typedef enum
107 {
112 
114 typedef enum
115 {
121 
122 
124 typedef enum
125 {
139 
140 
142 typedef enum
143 {
149 
150 
152 typedef enum
153 {
156 
160 
162 typedef enum
163 {
167 
168 /*******************************************************************************
169  ******************************* STRUCTS ***********************************
170  ******************************************************************************/
171 
173 typedef struct
174 {
176  bool enable;
177 
179  bool debugRun;
180 
183 
186 
189 
192 
193 #if defined(_RTCC_CTRL_BUMODETSEN_MASK)
194 
196  bool enaBackupModeSet;
197 #endif
198 
202 
205 
211 
212 
214 typedef struct
215 {
218 
221 
224 
227 
230 
233  uint8_t compMask;
234 
238 
239 
240 /*******************************************************************************
241  ******************************* DEFINES ***********************************
242  ******************************************************************************/
243 
245 #if defined(_RTCC_CTRL_BUMODETSEN_MASK)
246 #define RTCC_INIT_DEFAULT \
247 { \
248  true, /* Start counting when init done. */ \
249  false, /* Disable RTCC during debug halt. */ \
250  false, /* Disable precounter wrap on ch. 0 CCV value. */ \
251  false, /* Disable counter wrap on ch. 1 CCV value. */ \
252  rtccCntPresc_32, /* 977 us per tick. */ \
253  rtccCntTickPresc, /* Counter increments according to prescaler value. */ \
254  false, /* No RTCC storage on backup mode entry. */ \
255  false, /* No RTCC oscillator failure detection. */ \
256  rtccCntModeNormal, /* Normal RTCC mode. */ \
257  false, /* No leap year correction. */ \
258 }
259 #else
260 #define RTCC_INIT_DEFAULT \
261 { \
262  true, /* Start counting when init done. */ \
263  false, /* Disable RTCC during debug halt. */ \
264  false, /* Disable precounter wrap on ch. 0 CCV value. */ \
265  false, /* Disable counter wrap on ch. 1 CCV value. */ \
266  rtccCntPresc_32, /* 977 us per tick. */ \
267  rtccCntTickPresc, /* Counter increments according to prescaler value. */ \
268  false, /* No RTCC oscillator failure detection. */ \
269  rtccCntModeNormal, /* Normal RTCC mode. */ \
270  false, /* No leap year correction. */ \
271 }
272 #endif
273 
275 #define RTCC_CH_INIT_COMPARE_DEFAULT \
276 { \
277  rtccCapComChModeCompare, /* Select output compare mode. */ \
278  rtccCompMatchOutActionPulse, /* Create pulse on compare match. */ \
279  rtccPRSCh0, /* PRS channel 0 (not used). */ \
280  rtccInEdgeNone, /* No edge detection. */ \
281  rtccCompBaseCnt, /* Counter comparison base. */ \
282  0, /* No compare mask bits set. */ \
283  rtccDayCompareModeMonth /* Don't care */ \
284 }
285 
287 #define RTCC_CH_INIT_CAPTURE_DEFAULT \
288 { \
289  rtccCapComChModeCapture, /* Select input capture mode. */ \
290  rtccCompMatchOutActionPulse, /* Create pulse on capture. */ \
291  rtccPRSCh0, /* PRS channel 0. */ \
292  rtccInEdgeRising, /* Rising edge detection. */ \
293  rtccCompBaseCnt, /* Don't care. */ \
294  0, /* Don't care. */ \
295  rtccDayCompareModeMonth /* Don't care */ \
296 }
297 
299 #define RTCC_CH_VALID( ch ) ( ( ch ) < 3 )
300 
301 /*******************************************************************************
302  ***************************** PROTOTYPES **********************************
303  ******************************************************************************/
304 
305 /***************************************************************************/
315 __STATIC_INLINE uint32_t RTCC_ChannelCCVGet( int ch )
316 {
317  EFM_ASSERT( RTCC_CH_VALID( ch ) );
318  return RTCC->CC[ ch ].CCV;
319 }
320 
321 /***************************************************************************/
331 __STATIC_INLINE void RTCC_ChannelCCVSet( int ch, uint32_t value )
332 {
333  EFM_ASSERT( RTCC_CH_VALID( ch ) );
334  RTCC->CC[ ch ].CCV = value;
335 }
336 
337 /***************************************************************************/
347 __STATIC_INLINE uint32_t RTCC_ChannelDateGet( int ch )
348 {
349  EFM_ASSERT( RTCC_CH_VALID( ch ) );
350  return RTCC->CC[ ch ].DATE;
351 }
352 
353 /***************************************************************************/
363 __STATIC_INLINE void RTCC_ChannelDateSet( int ch, uint32_t date )
364 {
365  EFM_ASSERT( RTCC_CH_VALID( ch ) );
366  RTCC->CC[ ch ].DATE = date;
367 }
368 
369 void RTCC_ChannelInit( int ch, RTCC_CCChConf_TypeDef const *confPtr );
370 
371 /***************************************************************************/
381 __STATIC_INLINE uint32_t RTCC_ChannelTimeGet( int ch )
382 {
383  EFM_ASSERT( RTCC_CH_VALID( ch ) );
384  return RTCC->CC[ ch ].TIME;
385 }
386 
387 /***************************************************************************/
397 __STATIC_INLINE void RTCC_ChannelTimeSet( int ch, uint32_t time )
398 {
399  EFM_ASSERT( RTCC_CH_VALID( ch ) );
400  RTCC->CC[ ch ].TIME = time;
401 }
402 
403 /***************************************************************************/
410 __STATIC_INLINE uint32_t RTCC_CombinedCounterGet( void )
411 {
412  return RTCC->COMBCNT;
413 }
414 
415 /***************************************************************************/
422 __STATIC_INLINE uint32_t RTCC_CounterGet( void )
423 {
424  return RTCC->CNT;
425 }
426 
427 /***************************************************************************/
434 __STATIC_INLINE void RTCC_CounterSet( uint32_t value )
435 {
436  RTCC->CNT = value;
437 }
438 
439 /***************************************************************************/
446 __STATIC_INLINE uint32_t RTCC_DateGet( void )
447 {
448  return RTCC->DATE;
449 }
450 
451 /***************************************************************************/
458 __STATIC_INLINE void RTCC_DateSet( uint32_t date )
459 {
460  RTCC->DATE = date;
461 }
462 
463 /***************************************************************************/
470 __STATIC_INLINE void RTCC_EM4WakeupEnable( bool enable )
471 {
472  if ( enable )
473  {
474  RTCC->EM4WUEN = RTCC_EM4WUEN_EM4WU;
475  }
476  else
477  {
478  RTCC->EM4WUEN = 0;
479  }
480 }
481 
482 void RTCC_Enable( bool enable );
483 
484 void RTCC_Init( const RTCC_Init_TypeDef *init );
485 
486 /***************************************************************************/
494 __STATIC_INLINE void RTCC_IntClear( uint32_t flags )
495 {
496  RTCC->IFC = flags;
497 }
498 
499 /***************************************************************************/
507 __STATIC_INLINE void RTCC_IntDisable( uint32_t flags )
508 {
509  RTCC->IEN &= ~flags;
510 }
511 
512 /***************************************************************************/
525 __STATIC_INLINE void RTCC_IntEnable( uint32_t flags )
526 {
527  RTCC->IEN |= flags;
528 }
529 
530 /***************************************************************************/
541 __STATIC_INLINE uint32_t RTCC_IntGet( void )
542 {
543  return RTCC->IF;
544 }
545 
546 /***************************************************************************/
557 __STATIC_INLINE uint32_t RTCC_IntGetEnabled( void )
558 {
559  uint32_t tmp;
560 
561  tmp = RTCC->IEN;
562 
563  /* Bitwise AND of pending and enabled interrupt flags. */
564  return RTCC->IF & tmp;
565 }
566 
567 /***************************************************************************/
575 __STATIC_INLINE void RTCC_IntSet( uint32_t flags )
576 {
577  RTCC->IFS = flags;
578 }
579 
580 /***************************************************************************/
589 __STATIC_INLINE void RTCC_Lock( void )
590 {
592 }
593 
594 /***************************************************************************/
601 __STATIC_INLINE uint32_t RTCC_PreCounterGet( void )
602 {
603  return RTCC->PRECNT;
604 }
605 
606 /***************************************************************************/
613 __STATIC_INLINE void RTCC_PreCounterSet( uint32_t preCntVal )
614 {
615  RTCC->PRECNT = preCntVal;
616 }
617 
618 void RTCC_Reset( void );
619 
620 /***************************************************************************/
627 __STATIC_INLINE void RTCC_RetentionRamPowerDown( void )
628 {
629  RTCC->POWERDOWN = RTCC_POWERDOWN_RAM;
630 }
631 
632 void RTCC_StatusClear( void );
633 
634 /***************************************************************************/
641 __STATIC_INLINE uint32_t RTCC_StatusGet( void )
642 {
643  while ( RTCC->SYNCBUSY & RTCC_SYNCBUSY_CMD )
644  {
645  // Wait for syncronization.
646  }
647  return RTCC->STATUS;
648 }
649 
650 /***************************************************************************/
657 __STATIC_INLINE uint32_t RTCC_TimeGet( void )
658 {
659  return RTCC->TIME;
660 }
661 
662 /***************************************************************************/
669 __STATIC_INLINE void RTCC_TimeSet( uint32_t time )
670 {
671  RTCC->TIME = time;
672 }
673 
674 /***************************************************************************/
683 __STATIC_INLINE void RTCC_Unlock( void )
684 {
686 }
687 
691 #ifdef __cplusplus
692 }
693 #endif
694 
695 #endif /* defined( RTCC_COUNT ) && ( RTC_COUNT == 1 ) */
696 #endif /* __SILICON_LABS_EM_RTCC_H__ */
RTCC_CntMode_TypeDef cntMode
Definition: em_rtcc.h:204
#define _RTCC_CTRL_CNTPRESC_DIV8192
#define _RTCC_CTRL_CNTPRESC_DIV128
void RTCC_StatusClear(void)
Clear STATUS register.
Definition: em_rtcc.c:168
#define _RTCC_CC_CTRL_MODE_OUTPUTCOMPARE
Emlib peripheral API "assert" implementation.
RTCC_PrescMode_TypeDef prescMode
Definition: em_rtcc.h:191
#define _RTCC_CTRL_CNTTICK_PRESC
void RTCC_Init(const RTCC_Init_TypeDef *init)
Initialize RTCC.
Definition: em_rtcc.c:119
#define _RTCC_CTRL_CNTPRESC_DIV512
RTCC_InEdgeSel_TypeDef inputEdgeSel
Definition: em_rtcc.h:226
void RTCC_Enable(bool enable)
Enable/disable RTCC.
Definition: em_rtcc.c:101
#define _RTCC_CTRL_CNTPRESC_DIV1024
#define _RTCC_CTRL_CNTPRESC_DIV256
#define _RTCC_CC_CTRL_DAYCC_WEEK
__STATIC_INLINE uint32_t RTCC_ChannelDateGet(int ch)
Get the calendar DATE register content for selected channel.
Definition: em_rtcc.h:347
__STATIC_INLINE uint32_t RTCC_TimeGet(void)
Get TIME register value.
Definition: em_rtcc.h:657
#define RTCC_LOCK_LOCKKEY_LOCK
__STATIC_INLINE uint32_t RTCC_CounterGet(void)
Get RTCC counter value.
Definition: em_rtcc.h:422
__STATIC_INLINE void RTCC_DateSet(uint32_t date)
Set RTCC DATE register.
Definition: em_rtcc.h:458
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
#define _RTCC_CC_CTRL_ICEDGE_RISING
__STATIC_INLINE void RTCC_ChannelCCVSet(int ch, uint32_t value)
Set RTCC capture/compare register value (CCV) for selected channel.
Definition: em_rtcc.h:331
#define _RTCC_CC_CTRL_CMOA_CLEAR
#define _RTCC_CTRL_CNTPRESC_DIV2
__STATIC_INLINE uint32_t RTCC_IntGetEnabled(void)
Get enabled and pending RTCC interrupt flags.
Definition: em_rtcc.h:557
#define _RTCC_CC_CTRL_PRSSEL_PRSCH11
__STATIC_INLINE void RTCC_Unlock(void)
Unlock RTCC registers.
Definition: em_rtcc.h:683
#define _RTCC_CC_CTRL_ICEDGE_NONE
__STATIC_INLINE void RTCC_TimeSet(uint32_t time)
Set RTCC TIME register.
Definition: em_rtcc.h:669
#define _RTCC_CC_CTRL_PRSSEL_PRSCH1
__STATIC_INLINE void RTCC_ChannelTimeSet(int ch, uint32_t time)
Set the calendar TIME register for selected channel.
Definition: em_rtcc.h:397
RTCC_CompMatchOutAction_TypeDef compMatchOutAction
Definition: em_rtcc.h:220
RTCC_DayCompareMode_TypeDef
Definition: em_rtcc.h:162
bool precntWrapOnCCV0
Definition: em_rtcc.h:182
RTCC_CntPresc_TypeDef presc
Definition: em_rtcc.h:188
#define _RTCC_CTRL_CNTPRESC_DIV1
RTCC_DayCompareMode_TypeDef dayCompMode
Definition: em_rtcc.h:236
__STATIC_INLINE uint32_t RTCC_ChannelTimeGet(int ch)
Get the calendar TIME register content for selected channel.
Definition: em_rtcc.h:381
__STATIC_INLINE uint32_t RTCC_CombinedCounterGet(void)
Get the combined CNT/PRECNT register content.
Definition: em_rtcc.h:410
RTCC_CapComChMode_TypeDef
Definition: em_rtcc.h:106
#define _RTCC_CC_CTRL_MODE_OFF
__STATIC_INLINE void RTCC_IntClear(uint32_t flags)
Clear one or more pending RTCC interrupts.
Definition: em_rtcc.h:494
bool enaOSCFailDetect
Definition: em_rtcc.h:201
void RTCC_ChannelInit(int ch, RTCC_CCChConf_TypeDef const *confPtr)
Configure the selected capture/compare channel of the RTCC.
Definition: em_rtcc.c:77
#define _RTCC_CC_CTRL_COMPBASE_CNT
void RTCC_Reset(void)
Restore RTCC to its reset state.
Definition: em_rtcc.c:139
#define _RTCC_CC_CTRL_PRSSEL_PRSCH4
RTCC_CntMode_TypeDef
Definition: em_rtcc.h:61
#define _RTCC_CC_CTRL_PRSSEL_PRSCH6
#define _RTCC_CC_CTRL_ICEDGE_FALLING
#define _RTCC_CC_CTRL_COMPBASE_PRECNT
RTCC_PRSSel_TypeDef prsSel
Definition: em_rtcc.h:223
__STATIC_INLINE void RTCC_PreCounterSet(uint32_t preCntVal)
Set RTCC pre-counter value.
Definition: em_rtcc.h:613
#define _RTCC_CC_CTRL_PRSSEL_PRSCH7
bool disLeapYearCorr
Definition: em_rtcc.h:209
#define _RTCC_CTRL_CNTPRESC_DIV32768
__STATIC_INLINE uint32_t RTCC_IntGet(void)
Get pending RTCC interrupt flags.
Definition: em_rtcc.h:541
#define _RTCC_CC_CTRL_PRSSEL_PRSCH8
__STATIC_INLINE void RTCC_ChannelDateSet(int ch, uint32_t date)
Set the calendar DATE register for selected channel.
Definition: em_rtcc.h:363
__STATIC_INLINE void RTCC_IntSet(uint32_t flags)
Set one or more pending RTCC interrupts from SW.
Definition: em_rtcc.h:575
RTCC_PrescMode_TypeDef
Definition: em_rtcc.h:94
#define _RTCC_CC_CTRL_CMOA_PULSE
#define _RTCC_CC_CTRL_ICEDGE_BOTH
#define _RTCC_CC_CTRL_MODE_INPUTCAPTURE
#define _RTCC_CC_CTRL_PRSSEL_PRSCH9
RTCC_InEdgeSel_TypeDef
Definition: em_rtcc.h:142
RTCC_CapComChMode_TypeDef chMode
Definition: em_rtcc.h:217
#define _RTCC_CC_CTRL_PRSSEL_PRSCH0
__STATIC_INLINE uint32_t RTCC_ChannelCCVGet(int ch)
Get RTCC capture/compare register value (CCV) for selected channel.
Definition: em_rtcc.h:315
#define _RTCC_CC_CTRL_PRSSEL_PRSCH2
#define RTCC_EM4WUEN_EM4WU
#define _RTCC_CC_CTRL_PRSSEL_PRSCH10
bool cntWrapOnCCV1
Definition: em_rtcc.h:185
#define RTCC_CH_VALID(ch)
Definition: em_rtcc.h:299
#define _RTCC_CC_CTRL_CMOA_SET
#define RTCC
#define _RTCC_CC_CTRL_CMOA_TOGGLE
__STATIC_INLINE uint32_t RTCC_PreCounterGet(void)
Get RTCC pre-counter value.
Definition: em_rtcc.h:601
#define _RTCC_CC_CTRL_DAYCC_MONTH
RTCC_CompMatchOutAction_TypeDef
Definition: em_rtcc.h:114
__STATIC_INLINE uint32_t RTCC_StatusGet(void)
Get STATUS register value.
Definition: em_rtcc.h:641
#define _RTCC_CC_CTRL_PRSSEL_PRSCH3
#define _RTCC_CTRL_CNTPRESC_DIV8
#define _RTCC_CTRL_CNTPRESC_DIV4
RTCC_CompBase_TypeDef
Definition: em_rtcc.h:152
RTCC_CntPresc_TypeDef
Definition: em_rtcc.h:72
#define RTCC_SYNCBUSY_CMD
#define _RTCC_CTRL_CNTPRESC_DIV16384
#define _RTCC_CTRL_CNTPRESC_DIV32
#define _RTCC_CTRL_CNTTICK_CCV0MATCH
#define _RTCC_CTRL_CNTPRESC_DIV2048
__STATIC_INLINE void RTCC_Lock(void)
Lock RTCC registers.
Definition: em_rtcc.h:589
#define _RTCC_CTRL_CNTPRESC_DIV16
__STATIC_INLINE void RTCC_IntEnable(uint32_t flags)
Enable one or more RTCC interrupts.
Definition: em_rtcc.h:525
__STATIC_INLINE void RTCC_RetentionRamPowerDown(void)
Power down the retention ram.
Definition: em_rtcc.h:627
#define RTCC_LOCK_LOCKKEY_UNLOCK
__STATIC_INLINE uint32_t RTCC_DateGet(void)
Get DATE register value.
Definition: em_rtcc.h:446
#define _RTCC_CTRL_CNTPRESC_DIV64
RTCC_CompBase_TypeDef compBase
Definition: em_rtcc.h:229
RTCC_PRSSel_TypeDef
Definition: em_rtcc.h:124
__STATIC_INLINE void RTCC_CounterSet(uint32_t value)
Set RTCC CNT counter.
Definition: em_rtcc.h:434
#define _RTCC_CC_CTRL_PRSSEL_PRSCH5
#define RTCC_POWERDOWN_RAM
__STATIC_INLINE void RTCC_EM4WakeupEnable(bool enable)
Enable/disable EM4 wakeup capability.
Definition: em_rtcc.h:470
#define _RTCC_CTRL_CNTPRESC_DIV4096
__STATIC_INLINE void RTCC_IntDisable(uint32_t flags)
Disable one or more RTCC interrupts.
Definition: em_rtcc.h:507