16 #ifndef __SILICON_LABS_SPIDRV_H__
17 #define __SILICON_LABS_SPIDRV_H__
23 #include "spidrv_config.h"
24 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
46 #define ECODE_EMDRV_SPIDRV_OK ( ECODE_OK )
47 #define ECODE_EMDRV_SPIDRV_ILLEGAL_HANDLE ( ECODE_EMDRV_SPIDRV_BASE | 0x00000001 )
48 #define ECODE_EMDRV_SPIDRV_PARAM_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000002 )
49 #define ECODE_EMDRV_SPIDRV_BUSY ( ECODE_EMDRV_SPIDRV_BASE | 0x00000003 )
50 #define ECODE_EMDRV_SPIDRV_TIMER_ALLOC_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000004 )
51 #define ECODE_EMDRV_SPIDRV_TIMEOUT ( ECODE_EMDRV_SPIDRV_BASE | 0x00000005 )
52 #define ECODE_EMDRV_SPIDRV_IDLE ( ECODE_EMDRV_SPIDRV_BASE | 0x00000006 )
53 #define ECODE_EMDRV_SPIDRV_ABORTED ( ECODE_EMDRV_SPIDRV_BASE | 0x00000007 )
54 #define ECODE_EMDRV_SPIDRV_MODE_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000008 )
55 #define ECODE_EMDRV_SPIDRV_DMA_ALLOC_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000009 )
119 int itemsTransferred );
129 #if defined( _USART_ROUTELOC0_MASK )
135 uint8_t portLocation;
155 unsigned int txDMACh;
156 unsigned int rxDMACh;
166 volatile enum { spidrvStateIdle = 0, spidrvStateTransferring = 1 } state;
168 volatile bool blockingCompleted;
170 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
179 #if defined( _USART_ROUTELOC0_MASK )
180 #define SPIDRV_MASTER_USART0 \
184 _USART_ROUTELOC0_TXLOC_LOC0, \
185 _USART_ROUTELOC0_RXLOC_LOC0, \
186 _USART_ROUTELOC0_CLKLOC_LOC1, \
187 _USART_ROUTELOC0_CSLOC_LOC1, \
192 spidrvBitOrderMsbFirst, \
194 spidrvCsControlAuto, \
195 spidrvSlaveStartImmediate \
199 #define SPIDRV_MASTER_USART1 \
202 _USART_ROUTELOC0_TXLOC_LOC11, \
203 _USART_ROUTELOC0_RXLOC_LOC11, \
204 _USART_ROUTELOC0_CLKLOC_LOC11, \
205 _USART_ROUTELOC0_CSLOC_LOC11, \
210 spidrvBitOrderMsbFirst, \
212 spidrvCsControlAuto, \
213 spidrvSlaveStartImmediate \
217 #define SPIDRV_MASTER_USART2 \
220 _USART_ROUTELOC0_TXLOC_LOC0, \
221 _USART_ROUTELOC0_RXLOC_LOC0, \
222 _USART_ROUTELOC0_CLKLOC_LOC0, \
223 _USART_ROUTELOC0_CSLOC_LOC0, \
228 spidrvBitOrderMsbFirst, \
230 spidrvCsControlAuto, \
231 spidrvSlaveStartImmediate \
235 #define SPIDRV_MASTER_USARTRF0 \
238 _USART_ROUTELOC0_TXLOC_LOC0, \
239 _USART_ROUTELOC0_RXLOC_LOC0, \
240 _USART_ROUTELOC0_CLKLOC_LOC2, \
241 _USART_ROUTELOC0_CSLOC_LOC2, \
246 spidrvBitOrderMsbFirst, \
248 spidrvCsControlAuto, \
249 spidrvSlaveStartImmediate \
253 #define SPIDRV_SLAVE_USART0 \
256 _USART_ROUTELOC0_TXLOC_LOC0, \
257 _USART_ROUTELOC0_RXLOC_LOC0, \
258 _USART_ROUTELOC0_CLKLOC_LOC1, \
259 _USART_ROUTELOC0_CSLOC_LOC1, \
264 spidrvBitOrderMsbFirst, \
266 spidrvCsControlAuto, \
267 spidrvSlaveStartImmediate \
271 #define SPIDRV_SLAVE_USART1 \
274 _USART_ROUTELOC0_TXLOC_LOC11, \
275 _USART_ROUTELOC0_RXLOC_LOC11, \
276 _USART_ROUTELOC0_CLKLOC_LOC11, \
277 _USART_ROUTELOC0_CSLOC_LOC11, \
282 spidrvBitOrderMsbFirst, \
284 spidrvCsControlAuto, \
285 spidrvSlaveStartImmediate \
289 #define SPIDRV_SLAVE_USART2 \
292 _USART_ROUTELOC0_TXLOC_LOC0, \
293 _USART_ROUTELOC0_RXLOC_LOC0, \
294 _USART_ROUTELOC0_CLKLOC_LOC0, \
295 _USART_ROUTELOC0_CSLOC_LOC0, \
300 spidrvBitOrderMsbFirst, \
302 spidrvCsControlAuto, \
303 spidrvSlaveStartImmediate \
307 #define SPIDRV_SLAVE_USARTRF0 \
310 _USART_ROUTELOC0_TXLOC_LOC0, \
311 _USART_ROUTELOC0_RXLOC_LOC0, \
312 _USART_ROUTELOC0_CLKLOC_LOC2, \
313 _USART_ROUTELOC0_CSLOC_LOC2, \
318 spidrvBitOrderMsbFirst, \
320 spidrvCsControlAuto, \
321 spidrvSlaveStartImmediate \
327 #define SPIDRV_MASTER_USART0 \
330 _USART_ROUTE_LOCATION_LOC1, \
335 spidrvBitOrderMsbFirst, \
337 spidrvCsControlAuto, \
338 spidrvSlaveStartImmediate \
342 #define SPIDRV_MASTER_USART1 \
345 _USART_ROUTE_LOCATION_LOC1, \
350 spidrvBitOrderMsbFirst, \
352 spidrvCsControlAuto, \
353 spidrvSlaveStartImmediate \
357 #if defined( _EZR32_LEOPARD_FAMILY ) || defined( _EZR32_WONDER_FAMILY )
358 #define SPIDRV_MASTER_USART2 \
361 _USART_ROUTE_LOCATION_LOC1, \
366 spidrvBitOrderMsbFirst, \
368 spidrvCsControlAuto, \
369 spidrvSlaveStartImmediate \
372 #define SPIDRV_MASTER_USART2 \
375 _USART_ROUTE_LOCATION_LOC0, \
380 spidrvBitOrderMsbFirst, \
382 spidrvCsControlAuto, \
383 spidrvSlaveStartImmediate \
388 #define SPIDRV_MASTER_USARTRF0 \
391 RF_USARTRF_LOCATION, \
396 spidrvBitOrderMsbFirst, \
398 spidrvCsControlAuto, \
399 spidrvSlaveStartImmediate \
403 #define SPIDRV_MASTER_USARTRF1 \
406 RF_USARTRF_LOCATION, \
411 spidrvBitOrderMsbFirst, \
413 spidrvCsControlAuto, \
414 spidrvSlaveStartImmediate \
418 #define SPIDRV_SLAVE_USART0 \
421 _USART_ROUTE_LOCATION_LOC1, \
426 spidrvBitOrderMsbFirst, \
428 spidrvCsControlAuto, \
429 spidrvSlaveStartImmediate \
433 #define SPIDRV_SLAVE_USART1 \
436 _USART_ROUTE_LOCATION_LOC1, \
441 spidrvBitOrderMsbFirst, \
443 spidrvCsControlAuto, \
444 spidrvSlaveStartImmediate \
448 #if defined( _EZR32_LEOPARD_FAMILY ) || defined( _EZR32_WONDER_FAMILY )
449 #define SPIDRV_SLAVE_USART2 \
452 _USART_ROUTE_LOCATION_LOC1, \
457 spidrvBitOrderMsbFirst, \
459 spidrvCsControlAuto, \
460 spidrvSlaveStartImmediate \
463 #define SPIDRV_SLAVE_USART2 \
466 _USART_ROUTE_LOCATION_LOC0, \
471 spidrvBitOrderMsbFirst, \
473 spidrvCsControlAuto, \
474 spidrvSlaveStartImmediate \
479 #define SPIDRV_SLAVE_USARTRF0 \
482 _USART_ROUTE_LOCATION_LOC1, \
487 spidrvBitOrderMsbFirst, \
489 spidrvCsControlAuto, \
490 spidrvSlaveStartImmediate \
502 uint32_t *frameLength );
505 int *itemsTransferred,
506 int *itemsRemaining );
521 const void *txBuffer,
527 const void *txBuffer,
548 uint32_t frameLength );
562 const void *txBuffer,
569 const void *txBuffer,
Clock management unit (CMU) API.
SPIDRV_SlaveStart_t slaveStartMode
Slave mode transfer start scheme.
Ecode_t SPIDRV_GetTransferStatus(SPIDRV_Handle_t handle, int *itemsTransferred, int *itemsRemaining)
Get the status of a SPI transfer.
SPIDRV_Type_t type
SPI type, master or slave.
Ecode_t SPIDRV_DeInit(SPIDRV_Handle_t handle)
Deinitialize a SPI driver instance.
Ecode_t SPIDRV_AbortTransfer(SPIDRV_Handle_t handle)
Abort an ongoing SPI transfer.
uint32_t RTCDRV_TimerID_t
Timer ID.
Ecode_t SPIDRV_STransferB(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, int timeoutMs)
Start a SPI slave blocking transfer.
Ecode_t SPIDRV_GetBitrate(SPIDRV_Handle_t handle, uint32_t *bitRate)
Get current SPI bus bitrate.
Ecode_t SPIDRV_MTransmitB(SPIDRV_Handle_t handle, const void *buffer, int count)
Start a SPI master blocking transmit transfer.
Energy Aware drivers error code definitions.
uint32_t dummyTxValue
The value to transmit when using SPI receive API functions.
enum SPIDRV_ClockMode SPIDRV_ClockMode_t
SPI clock mode (clock polarity and phase).
MSB bit is transmitted first.
Ecode_t SPIDRV_MTransfer(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, SPIDRV_Callback_t callback)
Start a SPI master transfer.
Ecode_t SPIDRV_MReceive(SPIDRV_Handle_t handle, void *buffer, int count, SPIDRV_Callback_t callback)
Start a SPI master receive transfer.
SPIDRV_BitOrder_t bitOrder
Bit order on SPI bus, MSB or LSB first.
USART_TypeDef * port
The USART used for SPI.
Ecode_t SPIDRV_MTransferSingleItemB(SPIDRV_Handle_t handle, uint32_t txValue, void *rxValue)
Start a SPI master blocking single item (frame) transfer.
Ecode_t SPIDRV_MTransferB(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count)
Start a SPI master blocking transfer.
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
SPIDRV_CsControl
SPI master chip select (CS) control scheme.
SPI mode 2: CLKPOL=1, CLKPHA=0.
RTCDRV timer API definition.
uint8_t portLocationRx
Location number for SPI Rx pin.
uint32_t bitRate
SPI bitrate.
SPIDRV_ClockMode
SPI clock mode (clock polarity and phase).
Ecode_t SPIDRV_SetFramelength(SPIDRV_Handle_t handle, uint32_t frameLength)
Set SPI framelength.
SPI mode 1: CLKPOL=0, CLKPHA=1.
Transfer is started when bus is idle (CS deasserted).
LSB bit is transmitted first.
Ecode_t SPIDRV_SetBitrate(SPIDRV_Handle_t handle, uint32_t bitRate)
Set SPI bus bitrate.
Ecode_t SPIDRV_MTransmit(SPIDRV_Handle_t handle, const void *buffer, int count, SPIDRV_Callback_t callback)
Start a SPI master transmit transfer.
uint8_t portLocationClk
Location number for SPI Clk pin.
uint8_t portLocationCs
Location number for SPI Cs pin.
enum SPIDRV_BitOrder SPIDRV_BitOrder_t
SPI bus bit order.
struct SPIDRV_HandleData SPIDRV_HandleData_t
SPIDRV_SlaveStart
SPI slave transfer start scheme.
CS controlled by application.
uint8_t portLocationTx
Location number for SPI Tx pin.
static volatile uint8_t rxBuffer[RXBUFSIZE]
struct SPIDRV_Init SPIDRV_Init_t
Ecode_t SPIDRV_STransfer(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave transfer.
Ecode_t SPIDRV_STransmitB(SPIDRV_Handle_t handle, const void *buffer, int count, int timeoutMs)
Start a SPI slave blocking transmit transfer.
SPI mode 0: CLKPOL=0, CLKPHA=0.
DMADRV_PeripheralSignal_t
Peripherals that can trigger LDMA transfers.
Ecode_t SPIDRV_GetFramelength(SPIDRV_Handle_t handle, uint32_t *frameLength)
Get current SPI framelength.
Transfer is started immediately.
SPIDRV_BitOrder
SPI bus bit order.
Ecode_t SPIDRV_Init(SPIDRV_Handle_t handle, SPIDRV_Init_t *initData)
Initialize a SPI driver instance.
uint32_t Ecode_t
Typedef for API function errorcode return values.
Ecode_t SPIDRV_STransmit(SPIDRV_Handle_t handle, const void *buffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave transmit transfer.
CS controlled by SPI driver.
enum SPIDRV_CsControl SPIDRV_CsControl_t
SPI master chip select (CS) control scheme.
SPIDRV_Type
SPI driver instance type.
Ecode_t SPIDRV_SReceive(SPIDRV_Handle_t handle, void *buffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave receive transfer.
void(* SPIDRV_Callback_t)(struct SPIDRV_HandleData *handle, Ecode_t transferStatus, int itemsTransferred)
SPIDRV transfer completion callback function.
SPI mode 3: CLKPOL=1, CLKPHA=1.
uint32_t frameLength
SPI framelength, valid numbers are 4..16.
Ecode_t SPIDRV_SReceiveB(SPIDRV_Handle_t handle, void *buffer, int count, int timeoutMs)
Start a SPI slave blocking receive transfer.
enum SPIDRV_SlaveStart SPIDRV_SlaveStart_t
SPI slave transfer start scheme.
SPIDRV_HandleData_t * SPIDRV_Handle_t
SPI driver instance handle.
SPIDRV_CsControl_t csControl
Select master mode chip select (CS) control scheme.
SPIDRV_ClockMode_t clockMode
SPI mode, CLKPOL/CLKPHASE setting.
Ecode_t SPIDRV_MReceiveB(SPIDRV_Handle_t handle, void *buffer, int count)
Start a SPI master blocking receive transfer.
enum SPIDRV_Type SPIDRV_Type_t
SPI driver instance type.