35 #if defined(RMU_COUNT) && (RMU_COUNT > 0)
60 #if (_RMU_RSTCAUSE_MASK == 0x0000007FUL)
61 #define RMU_RSTCAUSE_PORST_XMASK (0x00000000)
62 #define RMU_RSTCAUSE_BODUNREGRST_XMASK (0x00000081)
63 #define RMU_RSTCAUSE_BODREGRST_XMASK (0x00000091)
64 #define RMU_RSTCAUSE_EXTRST_XMASK (0x00000001)
65 #define RMU_RSTCAUSE_WDOGRST_XMASK (0x00000003)
66 #define RMU_RSTCAUSE_LOCKUPRST_XMASK (0x0000EFDF)
67 #define RMU_RSTCAUSE_SYSREQRST_XMASK (0x0000EF9F)
68 #define NUM_RSTCAUSES (7)
70 #elif (_RMU_RSTCAUSE_MASK == 0x000007FFUL)
71 #define RMU_RSTCAUSE_PORST_XMASK (0x00000000)
72 #define RMU_RSTCAUSE_BODUNREGRST_XMASK (0x00000081)
73 #define RMU_RSTCAUSE_BODREGRST_XMASK (0x00000091)
74 #define RMU_RSTCAUSE_EXTRST_XMASK (0x00000001)
75 #define RMU_RSTCAUSE_WDOGRST_XMASK (0x00000003)
76 #define RMU_RSTCAUSE_LOCKUPRST_XMASK (0x0000EFDF)
77 #define RMU_RSTCAUSE_SYSREQRST_XMASK (0x0000EF9F)
78 #define RMU_RSTCAUSE_EM4RST_XMASK (0x00000719)
79 #define RMU_RSTCAUSE_EM4WURST_XMASK (0x00000619)
80 #define RMU_RSTCAUSE_BODAVDD0_XMASK (0x0000041F)
81 #define RMU_RSTCAUSE_BODAVDD1_XMASK (0x0000021F)
82 #define NUM_RSTCAUSES (11)
84 #elif (_RMU_RSTCAUSE_MASK == 0x0000FFFFUL)
85 #define RMU_RSTCAUSE_PORST_XMASK (0x00000000)
86 #define RMU_RSTCAUSE_BODUNREGRST_XMASK (0x00000081)
87 #define RMU_RSTCAUSE_BODREGRST_XMASK (0x00000091)
88 #define RMU_RSTCAUSE_EXTRST_XMASK (0x00000001)
89 #define RMU_RSTCAUSE_WDOGRST_XMASK (0x00000003)
90 #define RMU_RSTCAUSE_LOCKUPRST_XMASK (0x0000EFDF)
91 #define RMU_RSTCAUSE_SYSREQRST_XMASK (0x0000EF9F)
92 #define RMU_RSTCAUSE_EM4RST_XMASK (0x00000719)
93 #define RMU_RSTCAUSE_EM4WURST_XMASK (0x00000619)
94 #define RMU_RSTCAUSE_BODAVDD0_XMASK (0x0000041F)
95 #define RMU_RSTCAUSE_BODAVDD1_XMASK (0x0000021F)
96 #define RMU_RSTCAUSE_BUBODVDDDREG_XMASK (0x00000001)
97 #define RMU_RSTCAUSE_BUBODBUVIN_XMASK (0x00000001)
98 #define RMU_RSTCAUSE_BUBODUNREG_XMASK (0x00000001)
99 #define RMU_RSTCAUSE_BUBODREG_XMASK (0x00000001)
100 #define RMU_RSTCAUSE_BUMODERST_XMASK (0x00000001)
101 #define NUM_RSTCAUSES (16)
103 #elif ((_RMU_RSTCAUSE_MASK & 0x0FFFFFFF) == 0x00010F1DUL)
104 #define RMU_RSTCAUSE_PORST_XMASK (0x00000000)
105 #define RMU_RSTCAUSE_BODAVDD_XMASK (0x00000001)
106 #define RMU_RSTCAUSE_BODDVDD_XMASK (0x00000003)
107 #define RMU_RSTCAUSE_BODREGRST_XMASK (0x0000000F)
108 #define RMU_RSTCAUSE_EXTRST_XMASK (0x0000000F)
109 #define RMU_RSTCAUSE_LOCKUPRST_XMASK (0x0000001F)
110 #define RMU_RSTCAUSE_SYSREQRST_XMASK (0x0000001F)
111 #define RMU_RSTCAUSE_WDOGRST_XMASK (0x0000001F)
112 #define RMU_RSTCAUSE_EM4RST_XMASK (0x00000003)
113 #define NUM_RSTCAUSES (9)
116 #warning "RMU_RSTCAUSE XMASKs are not defined for this family."
126 uint32_t resetCauseMask;
127 uint32_t dontCareMask;
128 } RMU_ResetCauseMasks_Typedef;
136 static const RMU_ResetCauseMasks_Typedef resetCauseMasks[NUM_RSTCAUSES] =
139 #if defined(RMU_RSTCAUSE_BODUNREGRST)
142 #if defined(RMU_RSTCAUSE_BODREGRST)
145 #if defined(RMU_RSTCAUSE_AVDDBOD)
146 { RMU_RSTCAUSE_AVDDBOD, RMU_RSTCAUSE_BODAVDD_XMASK },
148 #if defined(RMU_RSTCAUSE_DVDDBOD)
149 { RMU_RSTCAUSE_DVDDBOD, RMU_RSTCAUSE_BODDVDD_XMASK },
151 #if defined(RMU_RSTCAUSE_DECBOD)
152 { RMU_RSTCAUSE_DECBOD, RMU_RSTCAUSE_BODREGRST_XMASK },
158 #if defined(RMU_RSTCAUSE_EM4RST)
161 #if defined(RMU_RSTCAUSE_EM4WURST)
164 #if defined(RMU_RSTCAUSE_BODAVDD0)
167 #if defined(RMU_RSTCAUSE_BODAVDD1)
170 #if defined(BU_PRESENT)
183 #if defined(EMLIB_REGRESSION_TEST)
186 extern uint32_t rstCause;
207 #if defined(_RMU_CTRL_PINRMODE_MASK)
213 #if defined(_RMU_CTRL_PINRMODE_MASK)
214 val = (uint32_t)mode << shift;
215 RMU->CTRL = (
RMU->CTRL & ~reset) | val;
235 #if defined(EMU_AUXCTRL_HRCCLR)
275 #if !defined(EMLIB_REGRESSION_TEST)
276 uint32_t rstCause =
RMU->RSTCAUSE;
278 uint32_t validRstCause = 0;
281 for (i = 0; i < NUM_RSTCAUSES; i++)
284 if ((rstCause & resetCauseMasks[i].resetCauseMask)
285 && !(rstCause & resetCauseMasks[i].dontCareMask))
288 validRstCause |= resetCauseMasks[i].resetCauseMask;
291 return validRstCause;
#define RMU_RSTCAUSE_BODUNREGRST
uint32_t RMU_ResetCauseGet(void)
Get the cause of the last reset.
RAM and peripheral bit-field set and clear API.
#define _EMU_AUXCTRL_HRCCLR_SHIFT
#define RMU_RSTCAUSE_BODAVDD0
Emlib general purpose utilities.
__STATIC_INLINE void EMU_Unlock(void)
Unlock the EMU so that writing to locked registers again is possible.
__STATIC_INLINE void EMU_Lock(void)
Lock the EMU in order to protect its registers against unintended modification.
#define RMU_RSTCAUSE_BODAVDD1
#define RMU_RSTCAUSE_BUMODERST
__STATIC_INLINE uint32_t EFM32_CTZ(uint32_t value)
Count trailing number of zero's.
void RMU_ResetControl(RMU_Reset_TypeDef reset, RMU_ResetMode_TypeDef mode)
Disable/enable reset for various peripherals and signal sources.
#define RMU_RSTCAUSE_LOCKUPRST
#define RMU_RSTCAUSE_EM4RST
#define RMU_RSTCAUSE_BUBODREG
Reset Management Unit (RMU) peripheral API.
Energy management unit (EMU) peripheral API.
#define RMU_RSTCAUSE_BODREGRST
#define RMU_RSTCAUSE_EXTRST
#define RMU_RSTCAUSE_PORST
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.
#define RMU_RSTCAUSE_EM4WURST
#define EMU_LOCK_LOCKKEY_LOCKED
void RMU_ResetCauseClear(void)
Clear the reset cause register.
#define RMU_RSTCAUSE_BUBODBUVIN
#define RMU_RSTCAUSE_WDOGRST
#define RMU_RSTCAUSE_SYSREQRST
#define RMU_RSTCAUSE_BUBODUNREG
#define RMU_RSTCAUSE_BUBODVDDDREG