EZR32 Leopard Gecko Software Documentation  ezr32lg-doc-4.2.1
spidrv.h
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1 /***************************************************************************/
16 #ifndef __SILICON_LABS_SPIDRV_H__
17 #define __SILICON_LABS_SPIDRV_H__
18 
19 #include "em_device.h"
20 #include "em_cmu.h"
21 
22 #include "ecode.h"
23 #include "spidrv_config.h"
24 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
25 #include "rtcdriver.h"
26 #endif
27 #include "dmadrv.h"
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
33 /***************************************************************************/
38 /***************************************************************************/
46 #define ECODE_EMDRV_SPIDRV_OK ( ECODE_OK )
47 #define ECODE_EMDRV_SPIDRV_ILLEGAL_HANDLE ( ECODE_EMDRV_SPIDRV_BASE | 0x00000001 )
48 #define ECODE_EMDRV_SPIDRV_PARAM_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000002 )
49 #define ECODE_EMDRV_SPIDRV_BUSY ( ECODE_EMDRV_SPIDRV_BASE | 0x00000003 )
50 #define ECODE_EMDRV_SPIDRV_TIMER_ALLOC_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000004 )
51 #define ECODE_EMDRV_SPIDRV_TIMEOUT ( ECODE_EMDRV_SPIDRV_BASE | 0x00000005 )
52 #define ECODE_EMDRV_SPIDRV_IDLE ( ECODE_EMDRV_SPIDRV_BASE | 0x00000006 )
53 #define ECODE_EMDRV_SPIDRV_ABORTED ( ECODE_EMDRV_SPIDRV_BASE | 0x00000007 )
54 #define ECODE_EMDRV_SPIDRV_MODE_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000008 )
55 #define ECODE_EMDRV_SPIDRV_DMA_ALLOC_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000009 )
56 
57 typedef enum SPIDRV_Type
59 {
63 
65 typedef enum SPIDRV_BitOrder
66 {
70 
72 typedef enum SPIDRV_ClockMode
73 {
79 
81 typedef enum SPIDRV_CsControl
82 {
86 
88 typedef enum SPIDRV_SlaveStart
89 {
93 
94 struct SPIDRV_HandleData;
95 
96 /***************************************************************************/
117 typedef void (*SPIDRV_Callback_t)( struct SPIDRV_HandleData *handle,
118  Ecode_t transferStatus,
119  int itemsTransferred );
120 
126 typedef struct SPIDRV_Init
127 {
129 #if defined( _USART_ROUTELOC0_MASK )
130  uint8_t portLocationTx;
131  uint8_t portLocationRx;
132  uint8_t portLocationClk;
133  uint8_t portLocationCs;
134 #else
135  uint8_t portLocation;
136 #endif
137  uint32_t bitRate;
138  uint32_t frameLength;
139  uint32_t dummyTxValue;
145 } SPIDRV_Init_t;
146 
151 typedef struct SPIDRV_HandleData
152 {
154  SPIDRV_Init_t initData;
155  unsigned int txDMACh;
156  unsigned int rxDMACh;
157  DMADRV_PeripheralSignal_t txDMASignal;
158  DMADRV_PeripheralSignal_t rxDMASignal;
159  SPIDRV_Callback_t userCallback;
160  uint32_t dummyRx;
161  int transferCount;
162  int remaining;
163  int csPort;
164  int csPin;
165  Ecode_t transferStatus;
166  volatile enum { spidrvStateIdle = 0, spidrvStateTransferring = 1 } state;
167  CMU_Clock_TypeDef usartClock;
168  volatile bool blockingCompleted;
169 
170  #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
171  RTCDRV_TimerID_t timer;
172  #endif
175 
178 
179 #if defined( _USART_ROUTELOC0_MASK ) /* _SILICON_LABS_PLATFORM_2 */
180 #define SPIDRV_MASTER_USART0 \
182 { \
183  USART0, /* USART port */ \
184  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
185  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
186  _USART_ROUTELOC0_CLKLOC_LOC1, /* USART Clk pin location number */ \
187  _USART_ROUTELOC0_CSLOC_LOC1, /* USART Cs pin location number */ \
188  1000000, /* Bitrate */ \
189  8, /* Frame length */ \
190  0, /* Dummy tx value for rx only funcs */ \
191  spidrvMaster, /* SPI mode */ \
192  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
193  spidrvClockMode0, /* SPI clock/phase mode */ \
194  spidrvCsControlAuto, /* CS controlled by the driver */ \
195  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
196 }
197 
199 #define SPIDRV_MASTER_USART1 \
200 { \
201  USART1, /* USART port */ \
202  _USART_ROUTELOC0_TXLOC_LOC11, /* USART Tx pin location number */ \
203  _USART_ROUTELOC0_RXLOC_LOC11, /* USART Rx pin location number */ \
204  _USART_ROUTELOC0_CLKLOC_LOC11,/* USART Clk pin location number */ \
205  _USART_ROUTELOC0_CSLOC_LOC11, /* USART Cs pin location number */ \
206  1000000, /* Bitrate */ \
207  8, /* Frame length */ \
208  0, /* Dummy tx value for rx only funcs */ \
209  spidrvMaster, /* SPI mode */ \
210  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
211  spidrvClockMode0, /* SPI clock/phase mode */ \
212  spidrvCsControlAuto, /* CS controlled by the driver */ \
213  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
214 }
215 
217 #define SPIDRV_MASTER_USART2 \
218 { \
219  USART2, /* USART port */ \
220  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
221  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
222  _USART_ROUTELOC0_CLKLOC_LOC0, /* USART Clk pin location number */ \
223  _USART_ROUTELOC0_CSLOC_LOC0, /* USART Cs pin location number */ \
224  1000000, /* Bitrate */ \
225  8, /* Frame length */ \
226  0, /* Dummy tx value for rx only funcs */ \
227  spidrvMaster, /* SPI mode */ \
228  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
229  spidrvClockMode0, /* SPI clock/phase mode */ \
230  spidrvCsControlAuto, /* CS controlled by the driver */ \
231  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
232 }
233 
235 #define SPIDRV_MASTER_USARTRF0 \
236 { \
237  USARTRF0, /* USART port */ \
238  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
239  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
240  _USART_ROUTELOC0_CLKLOC_LOC2, /* USART Clk pin location number */ \
241  _USART_ROUTELOC0_CSLOC_LOC2, /* USART Cs pin location number */ \
242  1000000, /* Bitrate */ \
243  8, /* Frame length */ \
244  0, /* Dummy tx value for rx only funcs */ \
245  spidrvMaster, /* SPI mode */ \
246  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
247  spidrvClockMode0, /* SPI clock/phase mode */ \
248  spidrvCsControlAuto, /* CS controlled by the driver */ \
249  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
250 }
251 
253 #define SPIDRV_SLAVE_USART0 \
254 { \
255  USART0, /* USART port */ \
256  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
257  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
258  _USART_ROUTELOC0_CLKLOC_LOC1, /* USART Clk pin location number */ \
259  _USART_ROUTELOC0_CSLOC_LOC1, /* USART Cs pin location number */ \
260  0, /* Bitrate */ \
261  8, /* Frame length */ \
262  0, /* Dummy tx value for rx only funcs */ \
263  spidrvSlave, /* SPI mode */ \
264  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
265  spidrvClockMode0, /* SPI clock/phase mode */ \
266  spidrvCsControlAuto, /* CS controlled by the driver */ \
267  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
268 }
269 
271 #define SPIDRV_SLAVE_USART1 \
272 { \
273  USART1, /* USART port */ \
274  _USART_ROUTELOC0_TXLOC_LOC11, /* USART Tx pin location number */ \
275  _USART_ROUTELOC0_RXLOC_LOC11, /* USART Rx pin location number */ \
276  _USART_ROUTELOC0_CLKLOC_LOC11,/* USART Clk pin location number */ \
277  _USART_ROUTELOC0_CSLOC_LOC11, /* USART Cs pin location number */ \
278  0, /* Bitrate */ \
279  8, /* Frame length */ \
280  0, /* Dummy tx value for rx only funcs */ \
281  spidrvSlave, /* SPI mode */ \
282  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
283  spidrvClockMode0, /* SPI clock/phase mode */ \
284  spidrvCsControlAuto, /* CS controlled by the driver */ \
285  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
286 }
287 
289 #define SPIDRV_SLAVE_USART2 \
290 { \
291  USART2, /* USART port */ \
292  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
293  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
294  _USART_ROUTELOC0_CLKLOC_LOC0, /* USART Clk pin location number */ \
295  _USART_ROUTELOC0_CSLOC_LOC0, /* USART Cs pin location number */ \
296  0, /* Bitrate */ \
297  8, /* Frame length */ \
298  0, /* Dummy tx value for rx only funcs */ \
299  spidrvSlave, /* SPI mode */ \
300  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
301  spidrvClockMode0, /* SPI clock/phase mode */ \
302  spidrvCsControlAuto, /* CS controlled by the driver */ \
303  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
304 }
305 
307 #define SPIDRV_SLAVE_USARTRF0 \
308 { \
309  USARTRF0, /* USART port */ \
310  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
311  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
312  _USART_ROUTELOC0_CLKLOC_LOC2, /* USART Clk pin location number */ \
313  _USART_ROUTELOC0_CSLOC_LOC2, /* USART Cs pin location number */ \
314  0, /* Bitrate */ \
315  8, /* Frame length */ \
316  0, /* Dummy tx value for rx only funcs */ \
317  spidrvSlave, /* SPI mode */ \
318  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
319  spidrvClockMode0, /* SPI clock/phase mode */ \
320  spidrvCsControlAuto, /* CS controlled by the driver */ \
321  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
322 }
323 
324 #else /* _SILICON_LABS_PLATFORM_1 */
325 
327 #define SPIDRV_MASTER_USART0 \
328 { \
329  USART0, /* USART port */ \
330  _USART_ROUTE_LOCATION_LOC1, /* USART pins location number */ \
331  1000000, /* Bitrate */ \
332  8, /* Frame length */ \
333  0, /* Dummy tx value for rx only funcs */ \
334  spidrvMaster, /* SPI mode */ \
335  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
336  spidrvClockMode0, /* SPI clock/phase mode */ \
337  spidrvCsControlAuto, /* CS controlled by the driver */ \
338  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
339 }
340 
342 #define SPIDRV_MASTER_USART1 \
343 { \
344  USART1, /* USART port */ \
345  _USART_ROUTE_LOCATION_LOC1, /* USART pins location number */ \
346  1000000, /* Bitrate */ \
347  8, /* Frame length */ \
348  0, /* Dummy tx value for rx only funcs */ \
349  spidrvMaster, /* SPI mode */ \
350  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
351  spidrvClockMode0, /* SPI clock/phase mode */ \
352  spidrvCsControlAuto, /* CS controlled by the driver */ \
353  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
354 }
355 
357 #if defined( _EZR32_LEOPARD_FAMILY ) || defined( _EZR32_WONDER_FAMILY )
358 #define SPIDRV_MASTER_USART2 \
359 { \
360  USART2, /* USART port */ \
361  _USART_ROUTE_LOCATION_LOC1, /* USART pins location number */ \
362  1000000, /* Bitrate */ \
363  8, /* Frame length */ \
364  0, /* Dummy tx value for rx only funcs */ \
365  spidrvMaster, /* SPI mode */ \
366  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
367  spidrvClockMode0, /* SPI clock/phase mode */ \
368  spidrvCsControlAuto, /* CS controlled by the driver */ \
369  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
370 }
371 #else
372 #define SPIDRV_MASTER_USART2 \
373 { \
374  USART2, /* USART port */ \
375  _USART_ROUTE_LOCATION_LOC0, /* USART pins location number */ \
376  1000000, /* Bitrate */ \
377  8, /* Frame length */ \
378  0, /* Dummy tx value for rx only funcs */ \
379  spidrvMaster, /* SPI mode */ \
380  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
381  spidrvClockMode0, /* SPI clock/phase mode */ \
382  spidrvCsControlAuto, /* CS controlled by the driver */ \
383  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
384 }
385 #endif
386 
388 #define SPIDRV_MASTER_USARTRF0 \
389 { \
390  USARTRF0, /* USART port */ \
391  RF_USARTRF_LOCATION, /* USART pins location number */ \
392  1000000, /* Bitrate */ \
393  8, /* Frame length */ \
394  0, /* Dummy tx value for rx only funcs */ \
395  spidrvMaster, /* SPI mode */ \
396  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
397  spidrvClockMode0, /* SPI clock/phase mode */ \
398  spidrvCsControlAuto, /* CS controlled by the driver */ \
399  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
400 }
401 
403 #define SPIDRV_MASTER_USARTRF1 \
404 { \
405  USARTRF1, /* USART port */ \
406  RF_USARTRF_LOCATION, /* USART pins location number */ \
407  1000000, /* Bitrate */ \
408  8, /* Frame length */ \
409  0, /* Dummy tx value for rx only funcs */ \
410  spidrvMaster, /* SPI mode */ \
411  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
412  spidrvClockMode0, /* SPI clock/phase mode */ \
413  spidrvCsControlAuto, /* CS controlled by the driver */ \
414  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
415 }
416 
418 #define SPIDRV_SLAVE_USART0 \
419 { \
420  USART0, /* USART port */ \
421  _USART_ROUTE_LOCATION_LOC1, /* USART pins location number */ \
422  0, /* Bitrate */ \
423  8, /* Frame length */ \
424  0, /* Dummy tx value for rx only funcs */ \
425  spidrvSlave, /* SPI mode */ \
426  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
427  spidrvClockMode0, /* SPI clock/phase mode */ \
428  spidrvCsControlAuto, /* CS controlled by the driver */ \
429  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
430 }
431 
433 #define SPIDRV_SLAVE_USART1 \
434 { \
435  USART1, /* USART port */ \
436  _USART_ROUTE_LOCATION_LOC1, /* USART pins location number */ \
437  0, /* Bitrate */ \
438  8, /* Frame length */ \
439  0, /* Dummy tx value for rx only funcs */ \
440  spidrvSlave, /* SPI mode */ \
441  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
442  spidrvClockMode0, /* SPI clock/phase mode */ \
443  spidrvCsControlAuto, /* CS controlled by the driver */ \
444  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
445 }
446 
448 #if defined( _EZR32_LEOPARD_FAMILY ) || defined( _EZR32_WONDER_FAMILY )
449 #define SPIDRV_SLAVE_USART2 \
450 { \
451  USART2, /* USART port */ \
452  _USART_ROUTE_LOCATION_LOC1, /* USART pins location number */ \
453  0, /* Bitrate */ \
454  8, /* Frame length */ \
455  0, /* Dummy tx value for rx only funcs */ \
456  spidrvSlave, /* SPI mode */ \
457  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
458  spidrvClockMode0, /* SPI clock/phase mode */ \
459  spidrvCsControlAuto, /* CS controlled by the driver */ \
460  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
461 }
462 #else
463 #define SPIDRV_SLAVE_USART2 \
464 { \
465  USART2, /* USART port */ \
466  _USART_ROUTE_LOCATION_LOC0, /* USART pins location number */ \
467  0, /* Bitrate */ \
468  8, /* Frame length */ \
469  0, /* Dummy tx value for rx only funcs */ \
470  spidrvSlave, /* SPI mode */ \
471  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
472  spidrvClockMode0, /* SPI clock/phase mode */ \
473  spidrvCsControlAuto, /* CS controlled by the driver */ \
474  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
475 }
476 #endif
477 
479 #define SPIDRV_SLAVE_USARTRF0 \
480 { \
481  USARTRF0, /* USART port */ \
482  _USART_ROUTE_LOCATION_LOC1, /* USART pins location number */ \
483  0, /* Bitrate */ \
484  8, /* Frame length */ \
485  0, /* Dummy tx value for rx only funcs */ \
486  spidrvSlave, /* SPI mode */ \
487  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
488  spidrvClockMode0, /* SPI clock/phase mode */ \
489  spidrvCsControlAuto, /* CS controlled by the driver */ \
490  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
491 }
492 #endif /* _USART_ROUTELOC0_MASK */
493 
494 Ecode_t SPIDRV_AbortTransfer( SPIDRV_Handle_t handle );
495 
496 Ecode_t SPIDRV_DeInit( SPIDRV_Handle_t handle );
497 
498 Ecode_t SPIDRV_GetBitrate( SPIDRV_Handle_t handle,
499  uint32_t *bitRate );
500 
501 Ecode_t SPIDRV_GetFramelength( SPIDRV_Handle_t handle,
502  uint32_t *frameLength );
503 
504 Ecode_t SPIDRV_GetTransferStatus( SPIDRV_Handle_t handle,
505  int *itemsTransferred,
506  int *itemsRemaining );
507 
508 Ecode_t SPIDRV_Init( SPIDRV_Handle_t handle,
509  SPIDRV_Init_t *initData );
510 
511 Ecode_t SPIDRV_MReceive( SPIDRV_Handle_t handle,
512  void *buffer,
513  int count,
514  SPIDRV_Callback_t callback );
515 
516 Ecode_t SPIDRV_MReceiveB( SPIDRV_Handle_t handle,
517  void *buffer,
518  int count );
519 
520 Ecode_t SPIDRV_MTransfer( SPIDRV_Handle_t handle,
521  const void *txBuffer,
522  void *rxBuffer,
523  int count,
524  SPIDRV_Callback_t callback );
525 
526 Ecode_t SPIDRV_MTransferB( SPIDRV_Handle_t handle,
527  const void *txBuffer,
528  void *rxBuffer,
529  int count );
530 
531 Ecode_t SPIDRV_MTransferSingleItemB( SPIDRV_Handle_t handle,
532  uint32_t txValue,
533  void *rxValue );
534 
535 Ecode_t SPIDRV_MTransmit( SPIDRV_Handle_t handle,
536  const void *buffer,
537  int count,
538  SPIDRV_Callback_t callback );
539 
540 Ecode_t SPIDRV_MTransmitB( SPIDRV_Handle_t handle,
541  const void *buffer,
542  int count );
543 
544 Ecode_t SPIDRV_SetBitrate( SPIDRV_Handle_t handle,
545  uint32_t bitRate );
546 
547 Ecode_t SPIDRV_SetFramelength( SPIDRV_Handle_t handle,
548  uint32_t frameLength );
549 
550 Ecode_t SPIDRV_SReceive( SPIDRV_Handle_t handle,
551  void *buffer,
552  int count,
553  SPIDRV_Callback_t callback,
554  int timeoutMs );
555 
556 Ecode_t SPIDRV_SReceiveB( SPIDRV_Handle_t handle,
557  void *buffer,
558  int count,
559  int timeoutMs );
560 
561 Ecode_t SPIDRV_STransfer( SPIDRV_Handle_t handle,
562  const void *txBuffer,
563  void *rxBuffer,
564  int count,
565  SPIDRV_Callback_t callback,
566  int timeoutMs );
567 
568 Ecode_t SPIDRV_STransferB( SPIDRV_Handle_t handle,
569  const void *txBuffer,
570  void *rxBuffer,
571  int count,
572  int timeoutMs );
573 
574 Ecode_t SPIDRV_STransmit( SPIDRV_Handle_t handle,
575  const void *buffer,
576  int count,
577  SPIDRV_Callback_t callback,
578  int timeoutMs );
579 
580 Ecode_t SPIDRV_STransmitB( SPIDRV_Handle_t handle,
581  const void *buffer,
582  int count,
583  int timeoutMs );
584 
588 #ifdef __cplusplus
589 }
590 #endif
591 
592 #endif /* __SILICON_LABS_SPIDRV_H__ */
Clock management unit (CMU) API.
SPIDRV_SlaveStart_t slaveStartMode
Slave mode transfer start scheme.
Definition: spidrv.h:144
Ecode_t SPIDRV_GetTransferStatus(SPIDRV_Handle_t handle, int *itemsTransferred, int *itemsRemaining)
Get the status of a SPI transfer.
Definition: spidrv.c:470
SPIDRV_Type_t type
SPI type, master or slave.
Definition: spidrv.h:140
DMADRV API definition.
Ecode_t SPIDRV_DeInit(SPIDRV_Handle_t handle)
Deinitialize a SPI driver instance.
Definition: spidrv.c:312
Ecode_t SPIDRV_AbortTransfer(SPIDRV_Handle_t handle)
Abort an ongoing SPI transfer.
Definition: spidrv.c:353
uint32_t RTCDRV_TimerID_t
Timer ID.
Definition: rtcdriver.h:49
Act as SPI slave.
Definition: spidrv.h:61
Ecode_t SPIDRV_STransferB(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, int timeoutMs)
Start a SPI slave blocking transfer.
Definition: spidrv.c:1124
Ecode_t SPIDRV_GetBitrate(SPIDRV_Handle_t handle, uint32_t *bitRate)
Get current SPI bus bitrate.
Definition: spidrv.c:406
Ecode_t SPIDRV_MTransmitB(SPIDRV_Handle_t handle, const void *buffer, int count)
Start a SPI master blocking transmit transfer.
Definition: spidrv.c:805
Energy Aware drivers error code definitions.
uint32_t dummyTxValue
The value to transmit when using SPI receive API functions.
Definition: spidrv.h:139
enum SPIDRV_ClockMode SPIDRV_ClockMode_t
SPI clock mode (clock polarity and phase).
MSB bit is transmitted first.
Definition: spidrv.h:68
Ecode_t SPIDRV_MTransfer(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, SPIDRV_Callback_t callback)
Start a SPI master transfer.
Definition: spidrv.c:607
Ecode_t SPIDRV_MReceive(SPIDRV_Handle_t handle, void *buffer, int count, SPIDRV_Callback_t callback)
Start a SPI master receive transfer.
Definition: spidrv.c:522
SPIDRV_BitOrder_t bitOrder
Bit order on SPI bus, MSB or LSB first.
Definition: spidrv.h:141
USART_TypeDef * port
The USART used for SPI.
Definition: spidrv.h:128
Ecode_t SPIDRV_MTransferSingleItemB(SPIDRV_Handle_t handle, uint32_t txValue, void *rxValue)
Start a SPI master blocking single item (frame) transfer.
Definition: spidrv.c:706
Ecode_t SPIDRV_MTransferB(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count)
Start a SPI master blocking transfer.
Definition: spidrv.c:657
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
SPIDRV_CsControl
SPI master chip select (CS) control scheme.
Definition: spidrv.h:81
SPI mode 2: CLKPOL=1, CLKPHA=0.
Definition: spidrv.h:76
RTCDRV timer API definition.
uint8_t portLocation
Location number for SPI pins.
Definition: spidrv.h:135
uint32_t bitRate
SPI bitrate.
Definition: spidrv.h:137
SPIDRV_ClockMode
SPI clock mode (clock polarity and phase).
Definition: spidrv.h:72
Ecode_t SPIDRV_SetFramelength(SPIDRV_Handle_t handle, uint32_t frameLength)
Set SPI framelength.
Definition: spidrv.c:874
SPI mode 1: CLKPOL=0, CLKPHA=1.
Definition: spidrv.h:75
Transfer is started when bus is idle (CS deasserted).
Definition: spidrv.h:91
CMU_Clock_TypeDef
Definition: em_cmu.h:256
LSB bit is transmitted first.
Definition: spidrv.h:67
Ecode_t SPIDRV_SetBitrate(SPIDRV_Handle_t handle, uint32_t bitRate)
Set SPI bus bitrate.
Definition: spidrv.c:841
Ecode_t SPIDRV_MTransmit(SPIDRV_Handle_t handle, const void *buffer, int count, SPIDRV_Callback_t callback)
Start a SPI master transmit transfer.
Definition: spidrv.c:763
enum SPIDRV_BitOrder SPIDRV_BitOrder_t
SPI bus bit order.
struct SPIDRV_HandleData SPIDRV_HandleData_t
SPIDRV_SlaveStart
SPI slave transfer start scheme.
Definition: spidrv.h:88
CS controlled by application.
Definition: spidrv.h:84
static volatile uint8_t rxBuffer[RXBUFSIZE]
struct SPIDRV_Init SPIDRV_Init_t
Ecode_t SPIDRV_STransfer(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave transfer.
Definition: spidrv.c:1053
Ecode_t SPIDRV_STransmitB(SPIDRV_Handle_t handle, const void *buffer, int count, int timeoutMs)
Start a SPI slave blocking transmit transfer.
Definition: spidrv.c:1257
SPI mode 0: CLKPOL=0, CLKPHA=0.
Definition: spidrv.h:74
Ecode_t SPIDRV_GetFramelength(SPIDRV_Handle_t handle, uint32_t *frameLength)
Get current SPI framelength.
Definition: spidrv.c:435
Transfer is started immediately.
Definition: spidrv.h:90
SPIDRV_BitOrder
SPI bus bit order.
Definition: spidrv.h:65
Ecode_t SPIDRV_Init(SPIDRV_Handle_t handle, SPIDRV_Init_t *initData)
Initialize a SPI driver instance.
Definition: spidrv.c:91
uint32_t Ecode_t
Typedef for API function errorcode return values.
Definition: ecode.h:31
Ecode_t SPIDRV_STransmit(SPIDRV_Handle_t handle, const void *buffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave transmit transfer.
Definition: spidrv.c:1193
CS controlled by SPI driver.
Definition: spidrv.h:83
enum SPIDRV_CsControl SPIDRV_CsControl_t
SPI master chip select (CS) control scheme.
Act as SPI master.
Definition: spidrv.h:60
SPIDRV_Type
SPI driver instance type.
Definition: spidrv.h:58
Ecode_t SPIDRV_SReceive(SPIDRV_Handle_t handle, void *buffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave receive transfer.
Definition: spidrv.c:927
void(* SPIDRV_Callback_t)(struct SPIDRV_HandleData *handle, Ecode_t transferStatus, int itemsTransferred)
SPIDRV transfer completion callback function.
Definition: spidrv.h:117
SPI mode 3: CLKPOL=1, CLKPHA=1.
Definition: spidrv.h:77
uint32_t frameLength
SPI framelength, valid numbers are 4..16.
Definition: spidrv.h:138
Ecode_t SPIDRV_SReceiveB(SPIDRV_Handle_t handle, void *buffer, int count, int timeoutMs)
Start a SPI slave blocking receive transfer.
Definition: spidrv.c:991
enum SPIDRV_SlaveStart SPIDRV_SlaveStart_t
SPI slave transfer start scheme.
SPIDRV_HandleData_t * SPIDRV_Handle_t
SPI driver instance handle.
Definition: spidrv.h:177
SPIDRV_CsControl_t csControl
Select master mode chip select (CS) control scheme.
Definition: spidrv.h:143
SPIDRV_ClockMode_t clockMode
SPI mode, CLKPOL/CLKPHASE setting.
Definition: spidrv.h:142
Ecode_t SPIDRV_MReceiveB(SPIDRV_Handle_t handle, void *buffer, int count)
Start a SPI master blocking receive transfer.
Definition: spidrv.c:565
enum SPIDRV_Type SPIDRV_Type_t
SPI driver instance type.