00001
00034 #ifndef __EM_DAC_H
00035 #define __EM_DAC_H
00036
00037 #include "em_device.h"
00038 #include "em_assert.h"
00039
00040 #if defined(DAC_COUNT) && (DAC_COUNT > 0)
00041
00042 #include <stdbool.h>
00043
00044 #ifdef __cplusplus
00045 extern "C" {
00046 #endif
00047
00048
00049
00054
00062 #define DAC_REF_VALID(ref) ((ref) == DAC0)
00063
00066
00067
00068
00069
00071 typedef enum
00072 {
00073 dacConvModeContinuous = _DAC_CTRL_CONVMODE_CONTINUOUS,
00074 dacConvModeSampleHold = _DAC_CTRL_CONVMODE_SAMPLEHOLD,
00075 dacConvModeSampleOff = _DAC_CTRL_CONVMODE_SAMPLEOFF
00076 } DAC_ConvMode_TypeDef;
00077
00079 typedef enum
00080 {
00081 dacOutputDisable = _DAC_CTRL_OUTMODE_DISABLE,
00082 dacOutputPin = _DAC_CTRL_OUTMODE_PIN,
00083 dacOutputADC = _DAC_CTRL_OUTMODE_ADC,
00084 dacOutputPinADC = _DAC_CTRL_OUTMODE_PINADC
00085 } DAC_Output_TypeDef;
00086
00087
00089 typedef enum
00090 {
00091 dacPRSSELCh0 = _DAC_CH0CTRL_PRSSEL_PRSCH0,
00092 dacPRSSELCh1 = _DAC_CH0CTRL_PRSSEL_PRSCH1,
00093 dacPRSSELCh2 = _DAC_CH0CTRL_PRSSEL_PRSCH2,
00094 dacPRSSELCh3 = _DAC_CH0CTRL_PRSSEL_PRSCH3,
00095 #if defined( _DAC_CH0CTRL_PRSSEL_PRSCH4 )
00096 dacPRSSELCh4 = _DAC_CH0CTRL_PRSSEL_PRSCH4,
00097 #endif
00098 #if defined( _DAC_CH0CTRL_PRSSEL_PRSCH5 )
00099 dacPRSSELCh5 = _DAC_CH0CTRL_PRSSEL_PRSCH5,
00100 #endif
00101 #if defined( _DAC_CH0CTRL_PRSSEL_PRSCH6 )
00102 dacPRSSELCh6 = _DAC_CH0CTRL_PRSSEL_PRSCH6,
00103 #endif
00104 #if defined( _DAC_CH0CTRL_PRSSEL_PRSCH7 )
00105 dacPRSSELCh7 = _DAC_CH0CTRL_PRSSEL_PRSCH7,
00106 #endif
00107 #if defined( _DAC_CH0CTRL_PRSSEL_PRSCH8 )
00108 dacPRSSELCh8 = _DAC_CH0CTRL_PRSSEL_PRSCH8,
00109 #endif
00110 #if defined( _DAC_CH0CTRL_PRSSEL_PRSCH9 )
00111 dacPRSSELCh9 = _DAC_CH0CTRL_PRSSEL_PRSCH9,
00112 #endif
00113 #if defined( _DAC_CH0CTRL_PRSSEL_PRSCH10 )
00114 dacPRSSELCh10 = _DAC_CH0CTRL_PRSSEL_PRSCH10,
00115 #endif
00116 #if defined( _DAC_CH0CTRL_PRSSEL_PRSCH11 )
00117 dacPRSSELCh11 = _DAC_CH0CTRL_PRSSEL_PRSCH11,
00118 #endif
00119 } DAC_PRSSEL_TypeDef;
00120
00121
00123 typedef enum
00124 {
00125 dacRef1V25 = _DAC_CTRL_REFSEL_1V25,
00126 dacRef2V5 = _DAC_CTRL_REFSEL_2V5,
00127 dacRefVDD = _DAC_CTRL_REFSEL_VDD
00128 } DAC_Ref_TypeDef;
00129
00130
00132 typedef enum
00133 {
00134 dacRefresh8 = _DAC_CTRL_REFRSEL_8CYCLES,
00135 dacRefresh16 = _DAC_CTRL_REFRSEL_16CYCLES,
00136 dacRefresh32 = _DAC_CTRL_REFRSEL_32CYCLES,
00137 dacRefresh64 = _DAC_CTRL_REFRSEL_64CYCLES
00138 } DAC_Refresh_TypeDef;
00139
00140
00141
00142
00143
00144
00146 typedef struct
00147 {
00149 DAC_Refresh_TypeDef refresh;
00150
00152 DAC_Ref_TypeDef reference;
00153
00155 DAC_Output_TypeDef outMode;
00156
00158 DAC_ConvMode_TypeDef convMode;
00159
00164 uint8_t prescale;
00165
00167 bool lpEnable;
00168
00170 bool ch0ResetPre;
00171
00173 bool outEnablePRS;
00174
00176 bool sineEnable;
00177
00179 bool diff;
00180 } DAC_Init_TypeDef;
00181
00183 #define DAC_INIT_DEFAULT \
00184 { dacRefresh8, \
00185 dacRef1V25, \
00186 dacOutputPin, \
00187 dacConvModeContinuous, \
00188 0, \
00189 false, \
00190 false, \
00191 false, \
00192 false, \
00193 false \
00194 }
00195
00196
00198 typedef struct
00199 {
00201 bool enable;
00202
00207 bool prsEnable;
00208
00213 bool refreshEnable;
00214
00219 DAC_PRSSEL_TypeDef prsSel;
00220 } DAC_InitChannel_TypeDef;
00221
00223 #define DAC_INITCHANNEL_DEFAULT \
00224 { false, \
00225 false, \
00226 false, \
00227 dacPRSSELCh0 \
00228 }
00229
00230
00231
00232
00233
00234
00235 void DAC_Enable(DAC_TypeDef *dac, unsigned int ch, bool enable);
00236 void DAC_Init(DAC_TypeDef *dac, const DAC_Init_TypeDef *init);
00237 void DAC_InitChannel(DAC_TypeDef *dac,
00238 const DAC_InitChannel_TypeDef *init,
00239 unsigned int ch);
00240 void DAC_ChannelOutputSet(DAC_TypeDef *dac,
00241 unsigned int channel,
00242 uint32_t value);
00243
00244
00258 __STATIC_INLINE void DAC_Channel0OutputSet( DAC_TypeDef *dac,
00259 uint32_t value )
00260 {
00261 EFM_ASSERT(value<=_DAC_CH0DATA_MASK);
00262 dac->CH0DATA = value;
00263 }
00264
00265
00266
00280 __STATIC_INLINE void DAC_Channel1OutputSet( DAC_TypeDef *dac,
00281 uint32_t value )
00282 {
00283 EFM_ASSERT(value<=_DAC_CH1DATA_MASK);
00284 dac->CH1DATA = value;
00285 }
00286
00287
00288
00299 __STATIC_INLINE void DAC_IntClear(DAC_TypeDef *dac, uint32_t flags)
00300 {
00301 dac->IFC = flags;
00302 }
00303
00304
00305
00316 __STATIC_INLINE void DAC_IntDisable(DAC_TypeDef *dac, uint32_t flags)
00317 {
00318 dac->IEN &= ~(flags);
00319 }
00320
00321
00322
00338 __STATIC_INLINE void DAC_IntEnable(DAC_TypeDef *dac, uint32_t flags)
00339 {
00340 dac->IEN |= flags;
00341 }
00342
00343
00344
00358 __STATIC_INLINE uint32_t DAC_IntGet(DAC_TypeDef *dac)
00359 {
00360 return(dac->IF);
00361 }
00362
00363
00364
00375 __STATIC_INLINE void DAC_IntSet(DAC_TypeDef *dac, uint32_t flags)
00376 {
00377 dac->IFS = flags;
00378 }
00379
00380 uint8_t DAC_PrescaleCalc(uint32_t dacFreq, uint32_t hfperFreq);
00381 void DAC_Reset(DAC_TypeDef *dac);
00382
00386 #ifdef __cplusplus
00387 }
00388 #endif
00389
00390 #endif
00391
00392 #endif