EZR32 Wonder Gecko Software Documentation  ezr32wg-doc-4.2.1
bsp_trace.c
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1 /**************************************************************************/
18 #include <stdbool.h>
19 #include "em_device.h"
20 #include "em_gpio.h"
21 #include "em_cmu.h"
22 #include "bsp_trace.h"
23 #include "bsp.h"
24 
25 #if defined( BSP_ETM_TRACE ) && defined( ETM_PRESENT )
26 /**************************************************************************/
30 void BSP_TraceEtmSetup(void)
31 {
32  /* Enable peripheral clocks */
33  CMU->HFCORECLKEN0 |= CMU_HFCORECLKEN0_LE;
34  CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
35  CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN;
36 
37  /* Wait until AUXHFRCO clock is ready */
38  while (!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY)) ;
39 
40  /* Enable Port D, pins 3,4,5,6 for ETM Trace Data output */
41  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE3_MASK) | GPIO_P_MODEL_MODE3_PUSHPULL;
42  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE4_MASK) | GPIO_P_MODEL_MODE4_PUSHPULL;
43  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE5_MASK) | GPIO_P_MODEL_MODE5_PUSHPULL;
44  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE6_MASK) | GPIO_P_MODEL_MODE6_PUSHPULL;
45 
46  /* Enable Port D, pin 7 for DBG_TCLK */
47  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE7_MASK) | GPIO_P_MODEL_MODE7_PUSHPULL;
48 
49  /* Configure trace output for alternate location */
53 }
54 #endif
55 
56 #if defined( _GPIO_ROUTE_SWOPEN_MASK ) || defined( _GPIO_ROUTEPEN_SWVPEN_MASK )
57 /**************************************************************************/
64 {
65  /* Enable GPIO clock */
66 #if defined( _CMU_HFPERCLKEN0_GPIO_MASK )
67  CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
68 #elif defined( _CMU_HFBUSCLKEN0_GPIO_MASK )
69  CMU->HFBUSCLKEN0 |= CMU_HFBUSCLKEN0_GPIO;
70 #endif
71 
72  /* Enable Serial wire output pin */
73 #if defined( _GPIO_ROUTE_SWOPEN_MASK )
74  GPIO->ROUTE |= GPIO_ROUTE_SWOPEN;
75 #elif defined( _GPIO_ROUTEPEN_SWVPEN_MASK )
76  GPIO->ROUTEPEN |= GPIO_ROUTEPEN_SWVPEN;
77 #endif
78 
79  /* Set correct location */
80 #if defined( _GPIO_ROUTE_SWOPEN_MASK )
81  GPIO->ROUTE = (GPIO->ROUTE & ~(_GPIO_ROUTE_SWLOCATION_MASK)) | BSP_TRACE_SWO_LOCATION;
82 #elif defined( _GPIO_ROUTEPEN_SWVPEN_MASK )
83  GPIO->ROUTELOC0 = (GPIO->ROUTELOC0 & ~(_GPIO_ROUTELOC0_SWVLOC_MASK)) | BSP_TRACE_SWO_LOCATION;
84 #endif
85 
86  /* Enable output on correct pin. */
87  TRACE_ENABLE_PINS();
88 
89  /* Enable debug clock AUXHFRCO */
90  CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN;
91 
92  /* Wait until clock is ready */
93  while (!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY)) ;
94 
95  /* Enable trace in core debug */
96  CoreDebug->DHCSR |= CoreDebug_DHCSR_C_DEBUGEN_Msk;
97  CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
98 
99  /* Enable PC and IRQ sampling output */
100  DWT->CTRL = 0x400113FF;
101 
102  /* Set TPIU prescaler to 16. */
103  TPI->ACPR = 15;
104 
105  /* Set protocol to NRZ */
106  TPI->SPPR = 2;
107 
108  /* Disable continuous formatting */
109  TPI->FFCR = 0x100;
110 
111  /* Unlock ITM and output data */
112  ITM->LAR = 0xC5ACCE55;
113  ITM->TCR = 0x10009;
114 
115  /* ITM Channel 0 is used for UART output */
116  ITM->TER |= (1UL << 0);
117 }
118 #endif
119 
120 
121 #if defined( _GPIO_ROUTE_SWOPEN_MASK ) || defined( _GPIO_ROUTEPEN_SWVPEN_MASK )
122 /**************************************************************************/
129 {
130  volatile uint32_t *userData = (uint32_t *) USER_PAGE;
131 
132  /* Check magic "trace" word in user page */
133  if (*userData == 0x00000000UL)
134  {
135  return false;
136  }
137  else
138  {
140  return true;
141  }
142 }
143 #endif
Clock management unit (CMU) API.
#define CMU_STATUS_AUXHFRCORDY
Definition: ezr32wg_cmu.h:571
#define GPIO_ROUTE_SWOPEN
Board support package API definitions.
#define _GPIO_P_MODEL_MODE7_MASK
Definition: ezr32wg_gpio.h:342
#define CMU_HFCORECLKEN0_LE
Definition: ezr32wg_cmu.h:836
#define CMU_HFPERCLKEN0_GPIO
Definition: ezr32wg_cmu.h:910
#define GPIO_P_MODEL_MODE5_PUSHPULL
Definition: ezr32wg_gpio.h:293
#define GPIO_P_MODEL_MODE4_PUSHPULL
Definition: ezr32wg_gpio.h:257
#define _GPIO_P_MODEL_MODE5_MASK
Definition: ezr32wg_gpio.h:270
#define GPIO_ROUTE_ETMLOCATION_LOC0
#define GPIO_P_MODEL_MODE3_PUSHPULL
Definition: ezr32wg_gpio.h:221
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
#define GPIO_ROUTE_TD2PEN
#define CMU_OSCENCMD_AUXHFRCOEN
Definition: ezr32wg_cmu.h:430
SWO Trace API (for eAProfiler)
#define _GPIO_P_MODEL_MODE3_MASK
Definition: ezr32wg_gpio.h:198
#define GPIO_ROUTE_TD0PEN
bool BSP_TraceProfilerSetup(void)
Profiler configuration.
Definition: bsp_trace.c:128
General Purpose IO (GPIO) peripheral API.
#define GPIO_P_MODEL_MODE6_PUSHPULL
Definition: ezr32wg_gpio.h:329
void BSP_TraceSwoSetup(void)
Configure trace output for energyAware Profiler.
Definition: bsp_trace.c:63
#define GPIO_ROUTE_TD1PEN
#define GPIO_P_MODEL_MODE7_PUSHPULL
Definition: ezr32wg_gpio.h:365
#define _GPIO_P_MODEL_MODE4_MASK
Definition: ezr32wg_gpio.h:234
#define GPIO
#define GPIO_ROUTE_TD3PEN
#define CMU
#define GPIO_ROUTE_TCLKPEN
#define _GPIO_ROUTE_SWLOCATION_MASK
#define _GPIO_P_MODEL_MODE6_MASK
Definition: ezr32wg_gpio.h:306